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M16C/28 Group
Under development Preliminary specification
Specifications in this manual are tentative and subject to change.
19. Flash Memory Version
Rev.0.60 2004.02.01
page 333 of N
REJ09B0047-0060Z
Table 19.4.1. EW0 Mode and EW1 Mode
Item
EW0 mode
EW1 mode(Note 2)
Operation mode
Single chip mode
Areas in which a
User ROM area
rewrite control
program can be located
Areas where
The rewrite control program must be The rewrite control program can be
rewrite control
transferred to any other than the flash excuted in the user ROM area
program can be
memory (e.g., RAM) before being
executed
Areas which can be
User ROM area
rewritten
However, this excludes blocks with the
rewrite control program
Software command
None
Program, block erase command
Restrictions
Cannot be executed in a block having
the rewite control program
Read Status Register command
Cannot be executed
Mode after programming Read Status Register mode
Read Array mode
or erasing
CPU state during auto-
Operating
Hold state (I/O ports retain the state
write and auto-erase
before the command is excuted
(Note 1)
Flash memory status
Read the FMR0 register's FMR00,
Read the FMR0 register's FMR00,
detection(Note 2)
FMR06, and FMR07 bits in the
FMR06, and FMR07 bits in a program
FMR0 register by program
Execute the read status register
command to read the SR7, SR5,
and SR4 bits.
Condition for transferring
Set the FMR40 and FMR41 bits in
The FMR40 bit in the FMR4 register is
to erase-suspend(Note 3)
the FMR4 register to "1" by program. set to "1" and the interruput request of
19.4 CPU Rewrite Mode
In CPU rewrite mode, the user ROM area can be rewritten when the CPU executes software commands. In
CPU rewrite mode, only the user ROM area shown in Figure 19.2.1 to 19.2.3 can be rewritten and the boot
ROM area cannot be rewritten. Verify the Program and the Block Erase commands are executed only on
blocks in the user ROM area. Therefore, the user ROM area can be rewritten directly while the microcom-
puter is mounted on-board without using a ROM programmer, etc.
For interrupts requested during an erasing operation in CPU rewrite mode, the M16C/28 flash module
offers an erase-suspend function which the erasing operation to be suspended, and access made available
to the flash. Erase-write 0 (EW0) mode and erase-write 1 (EW1) mode are provided as CPU rewrite mode.
Table 19.4.1 shows the differences between erase-write 0 (EW0) and erase-write 1 (EW1) modes. 1 wait is
required for the CPU erase-write control.
Note 1: Do not generate a DMA transfer.
Note 2: Block 1 and Block 0 are enabled for rewrite by setting FMR02 bit in the FMR0 register to "1" and
setting FMR16 bit in the FMR1 register to "1". Block 2 to Block 4 are enabled for rewrite by
setting FMR16 bit in the FMR1 register to "1".
Note 3: The time, until entering erase suspend and reading flash is enabled, is maximum td(SR-ES) after
satisfying the conditions