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參數(shù)資料
| 型號： | M30240M4-XXXFP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, MROM, MICROCONTROLLER, PQFP80 |
| 封裝： | 0.80 MM PITCH, PLASTIC, QFP-80 |
| 文件頁數(shù)： | 77/125頁 |
| 文件大?。?/td> | 753K |
| 代理商： | M30240M4-XXXFP |
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Mitsubishi microcomputers
M16C / 24 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
57
CONFIDENTIAL
Preliminary Specifications REV.B
Specifications in this manual are tentative and subject to change
Universal Serial Bus
OUTXCSR4 (FORCE_STALL):
The USB FCU sets this bit to a “1” if the host sends out a larger data packet than the MAXP size. The USB
FCU returns a STALL handshake while this bit is set. The CPU writes a “0” to clear this bit.
OUTXCSR5 (DATA_ERR):
The USB FCU sets this bit to a “1” to indicate a CRC error or a bit stuffing error received in an ISO packet.
The CPU writes a “0” to clear this bit.
OUTXCSR6 (FLUSH):
The CPU writes a “1” to this to flush the OUT FIFO. If there is one packet in the OUT FIFO, a flush causes
the OUT FIFO to be empty, if there are two packets in the OUT FIFO, a flush causes the older packet to be
flushed out from the OUT FIFO. Setting the OUTXCSR6 (FLUSH) bit during reception could produce unpre-
dictable results.
OUTXCSR7 (AUTO_CLR):
If the CPU sets this bit to a “1”, the OUT_PKT_RDY bit is cleared automatically by the USB FCU after the
number of bytes of data equal to the maximum packet size (MAXP) is unloaded from the OUT FIFO (see “OUT
(Receive) FIFO” operation for details).
Figure 48:
USB Endpoint x OUT CSR
The USB Endpoint x IN MAXP, shown in Figure 49, indicates the maximum packet size (MAXP) of an
Endpoint x IN packet. The default values for Endpoints 1-4 are 0 bytes. The CPU can change this val-
ue, as negotiated with the host controller through the SET_DESCRIPTOR command.
Figure 49:
USB Endpoint x IN MAXP
OUTXCSR0
OUT_PKT_RDY Flag (bit 0) (Write “0” only or Read)
0: Out packet is not ready
1: Out packet is ready
OUTXCSR1
OVER_RUN Flag (bit 1) (Write “0” only or Read)
0: No FIFO overrun
1: FIFO overrun occurred
OUTXCSR2
SEND_STALL Bit (bit 2)
0: No action
1: Stall OUT Endpoint X by the CPU
OUTXCSR3
ISO Bit (bit 3)
0: Select non-isochronous transfer
1: Select isochronous transfer
OUTXCSR4
FORCE_STALL Flag (bit 4) (Write “0” only or Read)
0: No action
1: Stall Endpoint X by the USB FCU
OUTXCSR5
DATA_ERR Flag (bit 5) (Write “0” only or Read)
0: No error
1: CRC or bit stufng error received in an ISO packet
OUTXCSR6
FLUSH Bit (bit 6) (Write Only - Read “0”)
0: No action
1: Flush the FIFO
OUTXCSR7
AUTO_CLR Bit (bit 7)
0: AUTO_CLR disabled
1: AUTO_CLR enabled
MSB
7
LSB
0
OUTXCSR7 OUTXCSR6 OUTXCSR5 OUTXCSR4 OUTXCSR3
OUTXCSR1 OUTXCSR0
OUTXCSR2
Address: 031A16
Access: R/W
Reset:
0016
Address: 032216
Address: 032A16
Address: 033216
IMAXP7:0
Maximum packet size (MAXP) of Endpoint x IN packet.
For endpoints that support smaller FIFO size, unused bits are not implemented
(always write “0” to those bits)
MSB
7
LSB
0
IMAXP7
IMAXP6
IMAXP5
IMAXP4
IMAXP3
IMAXP1
IMAXP0
IMAXP2
Address: 031B16
Access: R/W
Reset:
0016
Address: 032316
Address: 032B16
Address: 033316
相關(guān)PDF資料 |
PDF描述 |
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| M30245MC-XXXGP | 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP100 |
| M30245FCGP | 16-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP100 |
| M30260F3VGP | 16-BIT, FLASH, 20 MHz, MICROCONTROLLER, PQFP48 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M30240M5 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| M30240M5-XXXFP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| M30240M6 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| M30240M6-XXXFP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| M30240M7 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
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