參數(shù)資料
型號: M30240M4-XXXFP
元件分類: 微控制器/微處理器
英文描述: 16-BIT, MROM, MICROCONTROLLER, PQFP80
封裝: 0.80 MM PITCH, PLASTIC, QFP-80
文件頁數(shù): 46/125頁
文件大?。?/td> 753K
代理商: M30240M4-XXXFP
Mitsubishi microcomputers
M16C / 24 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
29
CONFIDENTIAL
Preliminary Specifications REV.B
Specifications in this manual are tentative and subject to change
Protection
Table 6:
Operating modes dictated by settings of system clock control registers 0 and 1
2.11 Protection
The protection function is provided so that the values in important registers cannot be changed in the
event that the program runs out of control. .Figure 14 shows the protect register. The values in the
processor mode register 0 (address 000416), processor mode register 1 (address 000516), system clock
control register 0 (address 000616), system clock control register 1 (address 000716) and frequency
synthesizer registers can only be changed when the respective bit in the protect register is set to “1”.
The system clock control registers 0 and 1 write-enable bit (bit 0 at 000A16) and processor mode register
0 and 1 write-enable bit (bit 1 at 000A16) do not automatically return to “0” after a value has been written
to an address. The program must therefore be written to return these bits to “0”.
Figure 14:
Protect register
CM17
CM16
CM06
CM05
CM04
Operating mode of internal clock
0100
Invalid
Division by 2 mode
1000
Invalid
Division by 4 mode
Invalid
1
0
Invalid
Division by 8 mode
1100
Invalid
Division by 16 mode
0000
Invalid
No-division mode
Protect register
Symbol
Address
When reset
PRCR
000A16
XXXXX0002
Bit name
Bit symbol
b7
b6
b5
b4
b3
b2
b1
b0
0 : Write-inhibited
1 : Write-enabled
PRC1
PRC0
Enables writing to processor mode
registers 0 and 1 (addresses 0004 16
and 000516)
Function
0 : Write-inhibited
1 : Write-enabled
Enables writing to system clock
control registers 0 and 1 (addresses
000616 and 000716
) and frequency
synthesizer registers (addresses
03DB16 and 03DF16
)
W
R
Nothing is assigned.
These bits can neither be set nor reset. When read, their contents are
indeterminate.
Reserved bit
Must always be set to "0"
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