
4-8
Register Descriptions
Figure 4.5
Register 4 (0x004)
VLC or Run Length Error Interrupt
This bit is set and INTRn is asserted (if not masked)
when an illegal variable length code (VLC) is detected in
the bitstream, for example:
0
1. when a start code is found in an unexpected location
in the bitstream, or
2. when there is an error in the run-length parameters
supplied to the IDCT unit.
The bit is cleared when read. INTRn is not asserted if the
host sets the mask bit.
Context Error Interrupt
1
This bit is set and INTRn is asserted (if not masked)
when the Video Decoder detects a parameter in the
bitstream that is not consistent with the context, e.g., an
illegal value. The bit is cleared when read. INTRn is not
asserted if the host sets the mask bit.
Audio CRC or Illegal Bit Error Interrupt
This bit is set and INTRn is asserted (if not masked) by
the Audio Decoder when it detects a CRC or illegal bit
error. The bit is cleared when read. INTRn is not asserted
if the host sets the mask bit.
2
Audio Sync Error Interrupt
3
This bit is set and INTRn is asserted (if not masked)
when an audio sync code is not in the expected location
in the bitstream. The bit is cleared when read. INTRn is
not asserted if the host sets the mask bit.
7
6
5
4
3
2
1
0
Read
S/P DIF
Channel
Buffer
Underflow
Interrupt
Packet
Error
Interrupt
Reserved
Audio Sync
Error
Interrupt
Audio CRC
or Illegal Bit
Error
Interrupt
Context
Error
Interrupt
VLC or Run
Length
Error
Interrupt
Write
S/P DIF
Channel
Buffer
Underflow
Mask
Packet
Error
Interrupt
Mask
Reserved
Audio Sync
Error Mask
Audio CRC
or Illegal Bit
Error Mask
Context
Error Mask
VLC or Run
Length
Error Mask