} // End of Download Interrupt The dev" />
參數(shù)資料
型號: IDT88K8483BRI
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 124/162頁
文件大?。?/td> 0K
描述: IC SPI-4 EXCHANGE 3PORT 672-BGA
標(biāo)準(zhǔn)包裝: 24
系列: *
其它名稱: 88K8483BRI
64 of 162
October 20, 2006
IDT IDT88K8483
} // End of Download
Interrupt
The device captures events in the Primary Interrupt Indication Register (p. 98). The Interrupt status fields in the Primary Interrupt Indication
Register (p. 98) are cleared by writing 1 to the appropriate field.
The device has two interrupt levels: a primary level and a secondary level. The primary level status indicates the interrupt status of module A/B/
COMMON. The secondary level status indicates the interrupt status per module.
Figure 32 Interrupt Scheme
event
enable
interrupt status
enable
&
|
INTB
interrupt status
module status
primary interrupt level
secundary interrupt level
&
captured
event
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