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參數(shù)資料
| 型號： | IDT88K8483BRI |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數(shù)： | 115/162頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SPI-4 EXCHANGE 3PORT 672-BGA |
| 標(biāo)準(zhǔn)包裝： | 24 |
| 系列： | * |
| 其它名稱： | 88K8483BRI |
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October 20, 2006
IDT IDT88K8483
QDR-II Flow Control
The IDT88K8483 gets the QDR-II FIFO status information from the QDR-II interface, and the PFP LID status information from the PFP logic. The
IDT88K8483 can be configured to one of two different flow control modes using the EBP_EN field in the PFP Egress Packet Mode Control Registers
(p. 123). According to the status information from the QDR-II FIFO and the PFP LID, and the flow control mode, the device generates the status indi-
cation to the SPI-4 interface as shown in Table 3 SPI-4 Status Information (p. 56).
If EBP_EN field in the PFP Egress Packet Mode Control Registers (p. 123) is 0 then the flow control mode is mode 1 - packet assembling, no back-
pressure or occasional (emergency) backpressure (for example when egress is not rate limited).
If EBP_EN field in the PFP Egress Packet Mode Control Registers (p. 123) is 1 then the flow control mode is mode 2 - buffering, frequent back-
pressure (for example rate limited egress).
- When the QDR-II flow control mode is mode 1, the device sends the PFP status to the SPI-4 interface.
- When the QDR-II flow control mode is mode 2, the device sends status to the SPI-4 interface based on the QDR-II status. If the QDR-II status is
satisfied or hungry, then the device sends satisfied status to the SPI-4 interface. If the QDR-II status is starving, then the device sends starving status
to the SPI-4 interface.
Flow Control Mode 1 - Packet Assembling
In the packet assembling option the IDT88K8483 receives the data in interleaved mode and it sends the data in packet mode (non-interleave
mode). In this option the PFP and the QDR-II should be programed to packet mode by setting to 1 the PKT_MODE field in the PFP Egress Packet
Mode Control Registers (p. 123) and the PKT_MODE field in the Auxiliary Packet Mode Configuration Register (p. 131). In this case, the device reas-
semble the interleave data from each channel to packet by monitoring the SOP and EOP indication. It starts the packet with the SOP indication and
ends the packet with the EOP indication. The device sends the data in packet mode from the QDR-II to the PFP and then to the port buffers and to the
SPI-4 interface.
An application example for flow control mode 1 (packet mode) is described in Figure 24. In this example the device is in over-booking mode, the
PFP is used only as a temporary storage, so the packets should be sent immediately from the PFP. Therefore, there is not enough memory for sched-
uling too many packets, and there cannot be frequent back-pressure. If there is too many back pressure the storage space is limited, and the over-
booking mode is not efficient. Since in this case there is no much back-pressure, there is no need to transfer the back-pressure from the QDR-II to the
PFP and to the interface. Therefore, the IDT88K8483 sends the PFP status to the interface.
QDR-II FIFO Status
SPI-4 Interface Status
(Flow Control Option 2)
starving
hungry
satisfied
starving
hungry
satisfied
starving
hungry
satisfied
Table 3 SPI-4 Status Information
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| IDT88P8341BHGI | 功能描述:IC SPI3-SPI4 EXCHANGE 820-PBGA RoHS:是 類別:集成電路 (IC) >> 專用 IC 系列:* 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 類型:調(diào)幀器 應(yīng)用:數(shù)據(jù)傳輸 安裝類型:表面貼裝 封裝/外殼:400-BBGA 供應(yīng)商設(shè)備封裝:400-PBGA（27x27） 包裝:散裝 |
| IDT88P8341BHI | 功能描述:IC SPI3-SPI4 EXCHANGE 820-PBGA RoHS:否 類別:集成電路 (IC) >> 專用 IC 系列:* 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 類型:調(diào)幀器 應(yīng)用:數(shù)據(jù)傳輸 安裝類型:表面貼裝 封裝/外殼:400-BBGA 供應(yīng)商設(shè)備封裝:400-PBGA（27x27） 包裝:散裝 |
| IDT88P8342BHGI | 功能描述:IC SPI3-SPI4 EXCHANGE 820-PBGA RoHS:是 類別:集成電路 (IC) >> 專用 IC 系列:* 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 類型:調(diào)幀器 應(yīng)用:數(shù)據(jù)傳輸 安裝類型:表面貼裝 封裝/外殼:400-BBGA 供應(yīng)商設(shè)備封裝:400-PBGA（27x27） 包裝:散裝 |
| IDT88P8342BHI | 功能描述:IC SPI3-SPI4 EXCHANGE 820-PBGA RoHS:否 類別:集成電路 (IC) >> 專用 IC 系列:* 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 類型:調(diào)幀器 應(yīng)用:數(shù)據(jù)傳輸 安裝類型:表面貼裝 封裝/外殼:400-BBGA 供應(yīng)商設(shè)備封裝:400-PBGA（27x27） 包裝:散裝 |
| IDT88P8344 | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:SPI EXCHANGE 4 x SPI-3 TO SPI-4 Issue 1.0 |
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