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參數(shù)資料
| 型號： | HDMP-1012 |
| 英文描述： | Phase Lock Loop (PLL) IC; Number of Circuits:1; Package/Case:14-DIP; Mounting Type:Through Hole |
| 中文描述： | 4Low成本千兆速率發(fā)送/接收芯片組 |
| 文件頁數(shù)： | 12/42頁 |
| 文件大?。?/td> | 321K |
| 代理商： | HDMP-1012 |
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584
HDMP-1012 (Tx), HDMP-1014 (Rx)
DC Electrical Specifications
Tc = 0
°
C to +85
°
C, GND = Ground, V
EE
= -4.5 V to -5.5 V
Symbol
V
IH,ECL
ECL Input High Voltage Level, Guaranteed high signal
for all inputs
V
IL,ECL
ECL Input Low Voltage Level, Guaranteed low signal
for all inputs
V
OH,ECL
ECL Output High Voltage Level, Terminated with
300
to -2.0 V
V
OL,ECL
ECL Output Low Voltage Level, Terminated with
300
to -2.0 V
V
IP,H50
H50 Input Peak-To-Peak Voltage
V
DC,BLL
BLL Output Bias Voltage Level
V
OP,BLL
BLL Output Peak-To-Peak Voltage, Terminated
with 50
, ac coupled
I
EE,Tx
Transmitter V
EE
Supply Current, with HCLKSEL off
Tc = 50
°
C
I
EE,Rx
Receiver V
EE
Supply Current, Tc = 50
°
C
Note:
1. BLL outputs are measured with external 150
pull-up resistors to ground. Refer to Figure 23 for additional information.
Parameter
Units
mV
Min.
-1150
Typ.
Max.
mV
-1500
mV
-1050
mV
-1600
mV
mV
mV
200
-900
+600
mA
+403
mA
+512
HDMP-1012 (Tx), HDMP-1014 (Rx)
AC Electrical Specifications
Tc = 25
°
C
Symbol
t
r
,ECL
t
f
,ECL
t
r
, BLL
t
f
,BLL
VSWR
i,H50
VSWR
o,BLL
Note:
1. BLL outputs are measured with external 150
pull-up resistors to ground. Refer to Figure 23 for additional information.
Parameter
Units
nsec
nsec
psec
psec
Min.
Typ.
1
4.5
200
170
2:1
2:1
Max.
ECL Rise Time, Terminated with 300
to -2.0 V
ECL Fall Time, Terminated with 300
to -2.0 V
BLL Rise Time, Terminated with 50
, ac coupled
BLL Fall Time, Terminated with 50
, ac coupled
H50 Input VSWR
BLL Output VSWR
HDMP-1012 (Tx), HDMP-1014 (Rx)
Typical Lock-Up Time
Tc = 25
°
C
DIV1
0
0
1
1
DIV0
0
1
0
1
HDMP-1012, msec
2.0
3.0
4.5
8.0
HDMP-1014, msec
2.2
3.2
4.7
11.0
LINK
[1]
, msec
2.5
3.5
5.0
12.0
Note:
1. Measured in Local Loop-Back mode with the state machine engaged and 0 cable length.
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