參數(shù)資料
型號: HB52F169E1
廠商: Hitachi,Ltd.
英文描述: 128 MB Registered SDRAM DIMM(128 MB 寄存同步DRAM DIMM)
中文描述: 128 MB的注冊SDRAM的內(nèi)存(128 MB的寄存同步的DRAM內(nèi)存)
文件頁數(shù): 41/57頁
文件大?。?/td> 870K
代理商: HB52F169E1
HB52F169E1-75F
41
2. Same bank:
The consecutive read command from write with auto precharge (the same bank) is illegal.
It is necessary to separate the two commands with a bank active command.
Read command to Precharge command interval (same bank):
When the precharge command is executed for the same bank as the read command that preceded it, the min-
imum interval between the two commands is one clock. However, since the output buffer then becomes
High-Z after the clocks defined by l
HZP
, there is a case of interruption to burst read data output will be inter-
rupted, if the precharge command is input during burst read. To read all data by burst read, the clocks defined
by l
EP
must be assured as an interval from the final data output to precharge command execution.
READ to PRECHARGE Command Interval (same bank): To output all data
CE Latency = 3, Burst Length = 4
CE Latency = 4, Burst Length = 4
READ to PRECHARGE Command Interval (same bank): To stop output data
CE Latency = 3, Burst Length = 1, 2, 4, 8, full page burst
CK
Command
Dout
READ
PRE/PALL
out A0
out A1
out A2
out A3
CL=3
l = -2 cycle
EP
CK
Command
Dout
READ
PRE/PALL
out A0
out A1
out A2
out A3
CL=4
l = -3 cycle
CK
Command
Dout
READ
PRE/PALL
out A0
High-Z
l
HZP
= 3
相關(guān)PDF資料
PDF描述
HB52F649E1 512 MB Registered SDRAM DIMM 64-Mword 】 72-bit, 133 MHz Memory Bus, 1-Bank Module (18 pcs of 64 M 】 4 Components) PC133SDRAM
HB52F649E1-75B 512 MB Registered SDRAM DIMM 64-Mword 】 72-bit, 133 MHz Memory Bus, 1-Bank Module (18 pcs of 64 M 】 4 Components) PC133SDRAM
HB52F649E1 512 MB Registered SDRAM DIMM(512 MB 寄存同步DRAM DIMM)
HB52F88EM 64 MB Unbuffered SDRAM DIMM(64 MB 未緩沖同步DRAM DIMM)
HB52F168EN 64 MB Unbuffered SDRAM DIMM(64 MB 未緩沖同步DRAM DIMM)
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