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| 型號(hào)： | EPF8482A |
| 英文描述： | Programmable Logic |
| 中文描述： | 可編程邏輯 |
| 文件頁數(shù)： | 9/61頁 |
| 文件大小： | 979K |
| 代理商： | EPF8482A |
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Altera Corporation
17
FLEX 8000 Programmable Logic Device Family Data Sheet
FLEX
8000
3
Each LE in an LAB can drive up to two separate column interconnect
channels. Therefore, all 16 available column channels can be driven by the
LAB. The column channels run vertically across the entire device, and
share access to LABs in the same column but in different rows. The
MAX+PLUS II Compiler chooses which LEs must be connected to a
column channel. A row interconnect channel can be fed by the output of
the LE or by two column channels. These three signals feed a multiplexer
that connects to a specific row channel. Each LE is connected to one 3-to-1
multiplexer. In an LAB, the multiplexers provide all 16 column channels
with access to 8 row channels.
Each column of LABs has a dedicated column interconnect that routes
signals out of the LABs into the column. The column interconnect can then
drive I/O pins or feed into the row interconnect to route the signals to
other LABs in the device. A signal from the column interconnect, which
can be either the output of an LE or an input from an I/O pin, must
transfer to the row interconnect before it can enter an LAB. Table 4
summarizes the FastTrack Interconnect resources available in each
FLEX 8000 device.
Figure 9 shows the interconnection of four adjacent LABs, with row,
column, and local interconnects, as well as the associated cascade and
carry chains.
Table 4. FLEX 8000 FastTrack Interconnect Resources
Device
Rows
Channels per Row
Columns
Channels per Column
EPF8282A
EPF8282AV
2
168
13
16
EPF8452A
2
168
21
16
EPF8636A
3
168
21
16
EPF8820A
4
168
21
16
EPF81188A
6
168
21
16
EPF81500A
6
216
27
16
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相關(guān)代理商/技術(shù)參數(shù) |
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| EPF8636A | 制造商:ALTERA 制造商全稱:Altera Corporation 功能描述:Programmable Logic Device Family |
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| EPF8636AGC192-5 | 制造商:Altera Corporation 功能描述:Field-Programmable Gate Array, 504 Cell, 192 Pin, Ceramic, PGA |
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