2
Altera Corporation
FLEX 8000 Programmable Logic Device Family Data Sheet
...and More
Features
s
Fabricated on an advanced SRAM process
s
Available in a variety of packages with 84 to 304 pins (see
Table 2)
s
Software design support and automatic place-and-route provided by
the Altera MAX+PLUS II development system for 486- and
Pentium-based PCs, and Sun SPARCstation, HP 9000 Series 700/800,
and IBM RISC System/6000 workstations
s
Additional design entry and simulation support provided by EDIF
2 0 0 and 3 0 0 netlist files, library of parameterized modules (LPM),
Verilog HDL, VHDL, and other interfaces to popular EDA tools from
manufacturers such as Cadence, Exemplar Logic, Mentor Graphics,
OrCAD, Synopsys, Synplicity, and Veribest
Note:
(1)
FLEX 8000 device package types include plastic J-lead chip carrier (PLCC), thin quad flat pack (TQFP), plastic quad
flat pack (PQFP), power quad flat pack (RQFP), ball-grid array (BGA), and pin-grid array (PGA) packages.
General
Description
Altera’s Flexible Logic Element MatriX (FLEX) family combines the
benefits of both erasable programmable logic devices (EPLDs) and field-
programmable gate arrays (FPGAs). The FLEX 8000 device family is ideal
for a variety of applications because it combines the fine-grained
architecture and high register count characteristics of FPGAs with the
high speed and predictable interconnect delays of EPLDs. Logic is
implemented in LEs that include compact 4-input look-up tables (LUTs)
and programmable registers. High performance is provided by a fast,
continuous network of routing resources.
Table 2. FLEX 8000 Package Options & I/O Pin Count
Device
84-Pin
PLCC
100-
Pin
TQFP
144-
Pin
TQFP
160-
Pin
PQFP
160-
Pin
PGA
192-
Pin
PGA
208-
Pin
PQFP
225-
Pin
BGA
232-
Pin
PGA
240-
Pin
PQFP
280-
Pin
PGA
304-
Pin
RQFP
EPF8282A
68
78
EPF8282AV
78
EPF8452A
68
120
EPF8636A
68
118
136
EPF8820A
112
120
152
EPF81188A
148
184
EPF81500A
181
208