參數(shù)資料
型號(hào): EPF8482A
英文描述: Programmable Logic
中文描述: 可編程邏輯
文件頁數(shù): 11/61頁
文件大小: 979K
代理商: EPF8482A
Altera Corporation
19
FLEX 8000 Programmable Logic Device Family Data Sheet
FLEX
8000
3
Figure 10. FLEX 8000 IOE
Numbers in parentheses are for EPF81500A devices only.
Row-to-IOE Connections
Figure 11 illustrates the connection between row interconnect channels
and IOEs. An input signal from an IOE can drive two separate row
channels. When an IOE is used as an output, the signal is driven by an
n-to-1 multiplexer that selects the row channels. The size of the
multiplexer varies with the number of columns in a device. EPF81500A
devices use a 27-to-1 multiplexer; EPF81188A, EPF8820A, EPF8636A, and
EPF8452A devices use a 21-to-1 multiplexer; and EPF8282A and
EPF8282AV devices use a 13-to-1 multiplexer. Eight IOEs are connected to
each side of the row channels.
from Row or Column
Interconnect
Slew-Rate
Control
to Row or Column
Interconnect
I/O Controls
6
(6)
CLRN
DQ
Programmable
Inversion
CLR0
CLR1/OE0
CLK1/OE1
CLK0
(OE
[4..9])
OE2
OE3
VCC
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