
____________________________________________________ DS34T101, DS34T102, DS34T104, DS34T108
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Table 9-3. External E1/T1 LIU Line Interface Pins
PIN DESCRIPTION
TCLKOn
O
8mA
Transmit Clock Output
TCLKOn: This signal is normally synchronous with TCLKFn. However, when framer
loopback or payload loopback is enabled
(RCR3.FLB=1, PLB=1) it becomes
synchronous with RCLKFn/RCLKn. When the internal LIU is disabled
(GCR2.LIUD=1), this pin and
TDATFn are the clock/data interface to an external LIU
(or other component such as an M13 mux or SONET/SDH mapper).
TDATFn
O
8mA
Transmit Data Output
When the internal LIU is enabled
(GCR2.LIUD=0), this pin is disabled (drives low).
When the internal LIU is disabled (LIUD=1), this pin and
TCLKOn are the transmit
clock/data interface to an external LIU (or other component such as an M13 mux or
SONET/SDH mapper).
TCR3.ODF must be set to 1 to configure the formatter to
output NRZ on TDATFn. TDATFn is updated on the rising edge of TCLKOn. See the
RCLKFn/RCLKn
IO
8mA
RCLKFn: Receive Framer Clock Input to Framer
This pin has the RCLKFn function when the internal LIU is disabled (
GCR2.LIUD=1).
In this mode, this pin and
RDATFn are the receive clock/data interface to an external
LIU (or other component such as an M13 mux or SONET/SDH mapper). RCLKFn
must be 1.544MHz for T1 or 2.048MHz for E1. RCLKFn is internally inverted when
RCLKn: Recovered Clock Output from LIU Receiver
This pin has the RCLKn function when the internal LIU is enabled (
GCR2.LIUD=0). In
this mode, the T1 or E1 clock recovered by the LIU receiver from the signal on
RTIPn/RRINGn is available on this pin.
In both modes, when the receive elastic store is disabled (
RESCR.RESE=0), RSERn
side of the framer on the rising edge of RCLKFn/RCLKn. (When the elastic store is
enabled, data is clocked into the elastic store on the rising edge of RCLKFn/RCLKn,
and data and frame/multiframe sync are clocked out of the elastic store on the rising
RDATFn
I
Receive Framer Data Input to Framer
When the internal LIU is enabled
(GCR2.LIUD=0), this pin is ignored.
When the internal LIU is disabled (LIUD=1), this pin and
RCLKFn are the receive
clock/data interface to an external LIU (or other component such as an M13 mux or
SONET/SDH mapper).
RCR3.IDF must be set to 1 to configure the framer to accept
NRZ data on RDATFn. RDATFn is latched on the falling edge of RCLKFn. See the