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____________________________________________________ DS34T101, DS34T102, DS34T104, DS34T108
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11.4.13 Receive SW CAS
The base address for the TDMoP Rx software CAS register space is 0x58,000. These registers specify the CAS
signaling bits the TDMoP block transmits on the TDMn_TSIG signals during unassigned timeslots and during
timeslots where CAS is not assigned. See section
10.6.5.2 for more details.
In the register descriptions in this section, the index port indicates port number: 1-8 for DS34T108, 1-4 for
DS34T104, 1-2 for DS34T102, 1 only for DS34T101. The index ts indicates timeslot number: 0 to 31.
Table 11-14. Receive SW CAS Registers
Addr
Offset
Register Name
Description
Page
Port 1
0x000
Rx software conditioning for timeslot 0 for Port 1
0x000+ts*4
Rx software conditioning for timeslot ts for Port 1
0x07C
Rx software conditioning for timeslot 31 for Port 1
Port 2
0x080
Rx software conditioning for timeslot 0 for Port 2
0x080+ts*4
Rx software conditioning for timeslot ts for Port 2
0x0FC
Rx software conditioning for timeslot 31 for Port 2
Port 3
0x100
Rx software conditioning for timeslot 0 for Port 3
0x100+ts*4
Rx software conditioning for timeslot ts for Port 3
0x17C
Rx software conditioning for timeslot 31 for Port 3
Port 4
0x180
Rx software conditioning for timeslot 0 for Port 4
0x180+ts*4
Rx software conditioning for timeslot ts for Port 4
0x1FC
Rx software conditioning for timeslot 31 for Port 4
Port 5
0x200
Rx software conditioning for timeslot 0 for Port 5
0x200+ts*4
Rx software conditioning for timeslot ts for Port 5
0x27C
Rx software conditioning for timeslot 31 for Port 5
Port 6
0x280
Rx software conditioning for timeslot 0 for Port 6
0x280+ts*4
Rx software conditioning for timeslot ts for Port 6
0x2FC
Rx software conditioning for timeslot 31 for Port 6
Port 7
0x300
Rx software conditioning for timeslot 0 for Port 7
0x300+ts*4
Rx software conditioning for timeslot ts for Port 7
0x37C
Rx software conditioning for timeslot 31 for Port 7
Port 8
0x380
Rx software conditioning for timeslot 0 for Port 8
0x380+ts*4
Rx software conditioning for timeslot ts for Port 8
0x3FC
Rx software conditioning for timeslot 31 for Port 8
Rx_SW_CAS 0x000+(port-1)*0x80+ts*4
Bits
Data Element Name
R/W
Reset
Value
Description
[31:4]
Reserved
-
0x0
Must be set to zero
[3:0]
Rx_CAS
R/W
None
CAS signaling (ABCD) transmitted towards TDMn_TSIG
Must be different from 0000.