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參數(shù)資料
| 型號： | DM9102 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Single Chip Fast Ethernet NIC controller |
| 中文描述： | 單芯片快速以太網(wǎng)網(wǎng)卡控制器 |
| 文件頁數(shù)： | 50/77頁 |
| 文件大?。?/td> | 459K |
| 代理商： | DM9102 |
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DM9102A
Single Chip Fast Ethernet NIC controller
50
Final
Version: DM9102A-DS-F03
August 28, 2000
Receive Descriptor Format
31
0
OWN
Status
Control bits
Buffer Address
Next Descriptor Address
RDES0
RDES1
RDES2
RDES3
Buffer Length
RDES0:
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
OWN
Frame Length ( FL )
AUN
OWN: Owner bit of received status
1=owned by DM9102, 0=owned by host
This bit should be reset after packet reception is completed.
The host will set this bit after received data is removed.
AUN: Received address unmatched.
FL: Frame Length
Frame length indicating total byte count of received packet.
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
ES
RF
CE
MF
DUE
LBOM
BD
ED
TLF
LCS
FT
RWT PLE
AE
FOE
This word-wide content includes status of received frame.
They are loaded after the received buffer that belongs to the
corresponding descriptor is full. All status bits are valid only
when the last descriptor (End Descriptor) bit is set.
Bit 15: ES, Error Summary
It is set for the following error conditions:
Descriptor Unavailable Error (DUE =1), Runt Frame
(RF=1), Excessive Frame Length (EFL=1), Late Collision
Seen (LCS=1), CRC error (CE=1), FIFO Overflow error
(FOE=1). Valid only when ED is set.
Bit 14: DUE, Descriptor Unavailable Error
It is set when the frame is truncated due to the buffer
unavailable. It is valid only when ED is set.
Bit 13,12: LBOM, Loopback Operation Mode
These two bits show the received frame is derived from:
00 --- normal operation
01 --- internal loopback
10 --- PHY loopback
11 --- external loopback
Bit 11: RF, Runt Frame
It is set to indicate the received frame has the size smaller
than 64 bytes. It is valid only when ED is set and FOE is
reset.
Bit 10: MF, Multicast Frame
It is set to indicate the received frame has a multicast
address. It is valid only when ED is set.
Bit 9: BD, Begin Descriptor
This bit is set for the descriptor indicating start of a received
frame.
Bit 8: ED, Ending Descriptor
This bit is set for descriptor to indicate end of a received
frame.
Bit 7: EFL, Excessive Frame Length
It is set to indicate the received frame length exceeds 1518
bytes. Valid only when ED is set.
Bit 6: LCS: Late Collision Seen
It is set to indicate a late collision found during the frame
reception. Valid only when ED is set.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DM9102A | Single Chip Fast Ethernet NIC controller |
| DM9102AF | Single Chip Fast Ethernet NIC controller |
| DM9102AT | Single Chip Fast Ethernet NIC controller |
| DM9108APPLICATIONENGINEERINGNOTESONE | DM9108 Application Engineering notes one |
| DM9108APPLICATIONENGINEERINGNOTESTHREE | DM9108 Application Engineering notes three |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DM9102A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single Chip Fast Ethernet NIC controller |
| DM9102AF | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single Chip Fast Ethernet NIC controller |
| DM9102AT | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single Chip Fast Ethernet NIC controller |
| DM9102D | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SINGLE CHIP FAST ETHEMET NIC CONTROLLER |
| DM9102DE | 制造商:DAVICOM 制造商全稱:DAVICOM 功能描述:Single Chip Fast Ethernet NIC Controller |
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