參數(shù)資料
型號(hào)： DM9102
廠商： Electronic Theatre Controls, Inc.
英文描述： Single Chip Fast Ethernet NIC controller
中文描述： 單芯片快速以太網(wǎng)網(wǎng)卡控制器
文件頁數(shù)： 44/77頁
文件大?。?/td> 459K
代理商： DM9102
DM9102A
Single Chip Fast Ethernet NIC controller
interface or a DM9102A reset. This bit works only in 10Mbps mode
44
Final
Version: DM9102A-DS-F03
August 28, 2000
1.0
Extended
Capability
1,RO/P
Extended Capability:
1=Extended register capability
0=Basic register capability only
PHY ID Identifier Register #1 (PHYIDR1) – 2
The PHY Identifier Register#1 and Register#2 work together in a single identifier of the DM9102A. The Identifier consists of a
concatenation of the Organizationally Unique Identifier (OUI), a vendor's model number, and a model revision number.
DAVICOM Semiconductor's IEEE assigned OUI is 00606E.
Bit
Name
Default
2.15-2.0
OUI_MSB
<0181H>
OUI Most Significant Bits:
This register stores bit 3 to 18 of the OUI (00606E) to bit 15 to 0 of this register
respectively. The most significant two bits of the OUI are ignored (the IEEE
standard refers to these as bit 1 and 2)
Description
PHY Identifier Register #2 (PHYIDR2) - 3
Bit
Name
OUI_LSB
Default
<101110>,
RO/P
Description
3.15-3.10
OUI Least Significant Bits:
Bit 19 to 24 of the OUI (00606E) are mapped to bit 15 to 10 of this register
respectively
Vendor Model Number:
Six bits of vendor model number mapped to bit 9 to 4 (most significant bit to bit
9)
Model Revision Number:
Four bits of vendor model revision number mapped to bit 3 to 0 (most
significant bit to bit 3)
3.9-3.4
VNDR_MDL
<000100>,
RO/P
3.3-3.0
MDL_REV
<0000>,
RO/P
Auto-negotiation Advertisement Register (ANAR) – 4
This register contains the advertised abilities of this DM9102A device as they will be transmitted to its link partner during Auto-
negotiation.
Bit
Name
Default
4.15
NP
0,RO/P
Next Page Indication:
0=No next page available
1=Next page available
The DM9102A has no next page, so this bit is permanently set to 0
4.14
ACK
0,RO
Acknowledge:
1=Link partner ability data reception acknowledged
0=Not acknowledged
The DM9102A's Auto-negotiation state machine will automatically control this
bit in the outgoing FLP bursts and set it at the appropriate time during the
Auto-negotiation process. Software should not attempt to write to this bit.
4.13
RF
0, RW
Remote Fault:
Description
相關(guān)PDF資料
PDF描述
DM9102A Single Chip Fast Ethernet NIC controller
DM9102AF Single Chip Fast Ethernet NIC controller
DM9102AT Single Chip Fast Ethernet NIC controller
DM9108APPLICATIONENGINEERINGNOTESONE DM9108 Application Engineering notes one
DM9108APPLICATIONENGINEERINGNOTESTHREE DM9108 Application Engineering notes three
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DM9102A 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single Chip Fast Ethernet NIC controller
DM9102AF 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single Chip Fast Ethernet NIC controller
DM9102AT 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single Chip Fast Ethernet NIC controller
DM9102D 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SINGLE CHIP FAST ETHEMET NIC CONTROLLER
DM9102DE 制造商:DAVICOM 制造商全稱:DAVICOM 功能描述:Single Chip Fast Ethernet NIC Controller
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