參數(shù)資料
型號： DM9102
廠商： Electronic Theatre Controls, Inc.
英文描述： Single Chip Fast Ethernet NIC controller
中文描述： 單芯片快速以太網(wǎng)網(wǎng)卡控制器
文件頁數(shù)： 43/77頁
文件大?。?/td> 459K
代理商： DM9102
DM9102A
Single Chip Fast Ethernet NIC controller
0= Normal Operation
0.6:0.0
Reserved
<0000000>,
RO
Final
Version: DM9102A-DS-F03
August 28, 2000
43
Reserved. Write as 0, ignore on read
Basic Mode Status Register (BMSR) – 1
Bit
1.15
Name
Default
0,RO/P
Description
100BASE-T4
100BASE-T4 Capable:
1=DM9102A is able to perform in 100BASE-T4 mode
0=DM9102A is not able to perform in 100BASE-T4 mode
100BASE-TX FULL DUPLEX CAPABLE:
1= DM9102A able to perform 100BASE-TX in Full Duplex mode
0= DM9102A not able to perform 100BASE-TX in Full Duplex mode
100BASE-TX Half Duplex Capable:
1=DM9102A is able to perform 100BASE-TX in Half Duplex mode
0=DM9102A is not able to perform 100BASE-TX in Half Duplex mode
10BASE-T Full Duplex Capable:
1=DM9102A is able to perform 10BASE-T in Full Duplex mode
0=DM9102A is not able to perform 10BASE-T in Full Duplex mode
10BASE-T Half Duplex Capable:
1=DM9102A is able to perform 10BASE-T in Half Duplex mode
0=DM9102A is not able to perform 10BASE-T in Half Duplex mode
Reserved:
Write as 0, ignore on read
MII Frame Preamble Suppression:
1=PHY will accept management frames with preamble suppressed
0=PHY will not accept management frames with preamble suppressed
Auto-negotiation Complete:
1=Auto-negotiation process completed
0=Auto-negotiation process not completed
Remote Fault:
1= Remote fault condition detected (cleared on read or by a chip reset). Fault
criteria and detection method is DM9102A implementation specific. This bit will
set after the RF bit in the ANLPAR (bit 13, register address 05) is set
0= No remote fault condition detected
Auto Configuration Ability:
1=DM9102A able to perform Auto-negotiation
0=DM9102A not able to perform Auto-negotiation
Link Status:
1=Valid link established (for either 10Mbps or 100Mbps operation)
0=Link not established
The link status bit is implemented with a latching function, so that the
occurrence of a link failure condition causes the Link Status bit to be cleared
and remain cleared until it is read via the management interface
Jabber Detect:
1=Jabber condition detected
0=No jabber
This bit is implemented with a latching function. Jabber conditions will set this
bit unless it is cleared by a read to this register through a management
1.14
100BASE-TX
Full Duplex
1,RO/P
1.13
100BASE-TX
Half Duplex
1,RO/P
1.12
10BASE-T
Full Duplex
1,RO/P
1.11
10BASE-T
Half Duplex
1,RO/P
1.10-1.7
Reserved
0000,RO
1.6
MF Preamble
Suppression
0,RO
1.5
Auto-negotiation
Complete
0,RO
1.4
Remote Fault
0,
RO/LH
1.3
Auto-negotiation
Ability
1,RO/P
1.2
Link Status
0,RO/LL
1.1
Jabber Detect
0,
RO/LH
相關(guān)PDF資料
PDF描述
DM9102A Single Chip Fast Ethernet NIC controller
DM9102AF Single Chip Fast Ethernet NIC controller
DM9102AT Single Chip Fast Ethernet NIC controller
DM9108APPLICATIONENGINEERINGNOTESONE DM9108 Application Engineering notes one
DM9108APPLICATIONENGINEERINGNOTESTHREE DM9108 Application Engineering notes three
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DM9102A 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single Chip Fast Ethernet NIC controller
DM9102AF 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single Chip Fast Ethernet NIC controller
DM9102AT 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single Chip Fast Ethernet NIC controller
DM9102D 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SINGLE CHIP FAST ETHEMET NIC CONTROLLER
DM9102DE 制造商:DAVICOM 制造商全稱:DAVICOM 功能描述:Single Chip Fast Ethernet NIC Controller
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