參數(shù)資料
型號： DM9102
廠商： Electronic Theatre Controls, Inc.
英文描述： Single Chip Fast Ethernet NIC controller
中文描述： 單芯片快速以太網(wǎng)網(wǎng)卡控制器
文件頁數(shù)： 47/77頁
文件大?。?/td> 459K
代理商： DM9102
DM9102A
Single Chip Fast Ethernet NIC controller
16.1
SLEEP
0,RW
Sleep Mode:
Writing a 1 to this bit will cause PHY entering the Sleep mode and power
down all circuit except oscillator and clock generator circuit. When waking up
from Sleep mode (write this bit to 0), the configuration will go back to the state
before sleep; but the state machine will be reset
16.0
RLOUT
0,RW
Remote Loop out Control:
When this bit is set to 1, the received data will loop out to the transmit channel.
This is useful for bit error rate testing
Final
Version: DM9102A-DS-F03
August 28, 2000
47
DAVICOM Specified Configuration and Status Register (DSCSR) - 11h
Bit
17.15
Name
100FDX
Default
1, RO
Description
100M Full Duplex Operation Mode:
After Auto-negotiation is completed, results will be written to this bit. If this bit is
1, it means the operation 1 mode is a 100Mbps Full Duplex mode. The
software can read bit[15:12] to see which mode is selected after Auto-
negotiation. This bit is invalid when it is not in the Auto-negotiation mode.
100M Half Duplex Operation Mode:
After Auto-negotiation is completed, results will be written to this bit. If this bit is
1, it means the operation 1 mode is a 100Mbps Half Duplex mode. The
software can read bit[15:12] to see which mode is selected after Auto-
negotiation. This bit is invalid when it is not in the Auto-negotiation mode.
10M Full Duplex Operation Mode:
After Auto-negotiation is completed, results will be written to this bit. If this bit is
1, it means the operation 1 mode is a 10Mbps Full Duplex mode. The
software can read bit[15:12] to see which mode is selected after Auto-
negotiation. This bit is invalid when it is not in the Auto-negotiation mode.
10M Half Duplex Operation Mode:
After Auto-negotiation is completed, results will be written to this bit. If this bit is
1, it means the operation 1 mode is a 10Mbps Half Duplex mode. The
software can read bit[15:12] to see which mode is selected after Auto-
negotiation. This bit is invalid when it is not in the Auto-negotiation mode.
Reserved:
Write as 0, ignore on read
00001, RW PHY Address Bit 4:0:
The first PHY address bit transmitted or received is the MSB of the address
(bit 4). A station management entity connected to multiple PHY entities must
know the appropriate address of each PHY. A PHY address of <00000> will
cause the isolate bit of the BMCR (bit 10, Register Address 00) to be set.
0000, RO
Auto-negotiation Monitor Bits:
These bits are for debug only. The Auto-negotiation status will be written to
these bits.
17.14
100HDX
1, RO
17.13
10FDX
1, RO
17.12
10HDX
1, RO
17.11-17.9
Reserved
000, RW
17.8-17.4
PHYAD[4:0]
17.3-17.0
ANMB[3:0]
相關PDF資料
PDF描述
DM9102A Single Chip Fast Ethernet NIC controller
DM9102AF Single Chip Fast Ethernet NIC controller
DM9102AT Single Chip Fast Ethernet NIC controller
DM9108APPLICATIONENGINEERINGNOTESONE DM9108 Application Engineering notes one
DM9108APPLICATIONENGINEERINGNOTESTHREE DM9108 Application Engineering notes three
相關代理商/技術參數(shù)
參數(shù)描述
DM9102A 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single Chip Fast Ethernet NIC controller
DM9102AF 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single Chip Fast Ethernet NIC controller
DM9102AT 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single Chip Fast Ethernet NIC controller
DM9102D 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SINGLE CHIP FAST ETHEMET NIC CONTROLLER
DM9102DE 制造商:DAVICOM 制造商全稱:DAVICOM 功能描述:Single Chip Fast Ethernet NIC Controller
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