參數(shù)資料
型號： DDP3300A
廠商： MICRONAS SEMICONDUCTOR HOLDING AG
英文描述： Single-Chip Display and Deflection Processor
中文描述： 單芯片顯示器和偏轉(zhuǎn)處理器
文件頁數(shù)： 6/53頁
文件大?。?/td> 1767K
代理商： DDP3300A
PRELIMINARY DATA SHEET
DDP 3300 A
MICRONAS INTERMETALL
6
1.3. Digital Video Interfaces
The digital video interface allows input of digital data in
YC
r
C
b
format on the YC
r
C
b
data bus. The orthogonal
data structure of this bus is the ideal interface point to ex-
ternal data sources and sinks. Furthermore, a host of
formats are supported, e.g. support of level-2 teletext or
the priority pixel bus concept.
Figure 1–3 shows all available digital interfaces:
YC
r
C
b
16 bit 4:2:2
OSD 5 bit 4:4:4
PRIO 3 bit, source selection
The YCrCb bus is used for video input. The OSD inter-
face is used for insertion of a Teletext or OSD picture.
The priority bus allows to mix up to 8 sources on the
YC
r
C
b
/OSD bus.
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O
Y
PIP
TPU
CCU/
OSD
DDP 3300A
Display and
Deflection Processor
Fig. 1–3:
DDP video interfaces
èèèèèè
èèèèèè
VPC
1.3.1. Picture Bus Interface
The video bus
The video bus format between all DIGIT3000 ICs is
YCrCb with 20.25 Msamples/s. Only active video is
transferred, synchronized by the system main sync sig-
nal (MSY), which indicates the start of valid data for each
scan line. The number of active samples per line is 1080
for all standards (525 and 625).
Via the MSY line, serial data is transferred which con-
tains information on the main picture, such as current
line number, odd/even field etc. It is generated by the
deflection circuitry and represents the orthogonal time-
base for the entire system.
Feature ICs (e.g. PIP) will be synchronized to the main
YC
r
C
b
bus. Digital insertion (boxing) is controlled by a
priority system.
1.3.2. Digital OSD Interface
Digital OSD from text or on-screen-display is connected
via the Picture bus. The OSD signal is 5 bits wide. The
OSD signals are not subject to any post-filtering. The
OSD signal provides 3-bit RGB (one bit per color), the
4th bit allows to display of half contrast colors. The 5
th
bit
enables a programmable color-look-up table with 16 en-
tries and 4-bit resolution per color. This allows the sup-
port of a World System Teletext level-2 color display. Dis-
play contrast for OSD data can be adjusted separately
by three contrast multipliers.
1.3.3. Priority Interface
Up to eight digital YC
r
C
b
or OSD sources (main decoder,
PIP, OSD, text, etc.) may be selected in real-time by
means of a 3-bit priority bus. Thus, a pixelwise bus arbi-
tration and source switching is possible. It is essential
that all YC
r
C
b
-sources are synchronous and orthogonal.
In general, each source (
bus request. This bus request may either be software or
hardware-controlled, i.e. by a fast blank signal. Data col-
lision is avoided by a bus arbiter that provides the indi-
vidual bus acknowledge in accordance to a user-defined
priority.
master) has its own YC
r
C
b
Each master sends a bus request with his individual
priority ID onto the Prio-bus and immediately reads back
the bus status. Only in case of positive arbitration (send-
Prio-ID
read-Prio-ID) the bus acknowledge becomes
active and the data is sent.
This treatment has many features that have impact on
the appearance of a TV picture:
– real-time bus arbitration (PIP, OSD...)
– priority configuration by software
– different coefficients for different sources
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