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參數(shù)資料
| 型號(hào)： | DDP3300A |
| 廠商： | MICRONAS SEMICONDUCTOR HOLDING AG |
| 英文描述： | Single-Chip Display and Deflection Processor |
| 中文描述： | 單芯片顯示器和偏轉(zhuǎn)處理器 |
| 文件頁數(shù)： | 33/53頁 |
| 文件大?。?/td> | 1767K |
| 代理商： | DDP3300A |
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DDP 3300 A
PRELIMINARY DATA SHEET
MICRONAS INTERMETALL
33
Pin 17 – Measurement ADC Reference Input
MGND
This is the ground reference for the measurement A/D
converter.
Pin 18 – Vertical Sawtooth Output
VERT
(Fig. 4–15)
This pin supplies the drive signal for the vertical output
stage. The drive signal is generated with 15-bit precision
by the Fast Processor in the VPC. The analog voltage is
generated by a 4 bit current-DAC with external resistor
and uses digital noise shaping.
Pin 19 – East-West Parabola Output
EW
(Fig. 4–15)
This pin supplies the parabola signal for the East-West
correction. The drive signal is generated with 15 bit pre-
cision by the Fast Processor in the VPC. The analog
voltage is generated by a 4 bit current-DAC with external
resistor and uses digital noise shaping.
Pin 20 – NC
Pin 21 – DAC Current Reference
XREF
(Fig. 4–16)
External reference resistor for DAC output currents, typi-
cal 10 k
to adjust the output current of the D/A convert-
ers. (see recommended operating conditions). This re-
sistor has to be connected to analog ground as closely
as possible to the pin.
Pin 23 – Scan Velocity Modulation Output
SVMOUT
(Fig. 4–12)
This output delivers the analog SVM signal. The D/A
converter is a current sink like the RGB D/A converters.
At zero signal the output current is 50% of the maximum
output current.
Pin 26,25,24 – Analog RGB Output
ROUT
,
GOUT
,
BOUT
(Fig. 4–12)
This are the analog Red/Green/Blue outputs of the back-
end. The outputs are current sinks with a maximum cur-
rent of 8 mA.
Pin 27 – Ground, Analog Backend
GNDO
Pin 28 – Supply Voltage, Analog Backend
VSUPO
Pin 29 – DAC Reference Decoupling/Beam Current
Safety
VRD/BCS
(Fig. 4–16)
Via this pin the DAC reference voltage is decoupled by
an external capacitor. The DAC output currents depend
on this voltage, therefore a pulldown transistor can be
used to shut off all beam currents. A decoupling capaci-
tor of 3.3
μ
F||100 nF is required.
Pin 32,31,30 – Analog RGB Input
RIN
,
GIN
,
BIN
(Fig. 4–9)
These pins are used to insert an external analog RGB
signal, e.g. from a SCART connector which can by
switched to the analog RGB outputs with the fast blank
signal. The analog backend provides separate bright-
ness and contrast settings for the external analog RGB
signals.
Pin 33 – Fast Blank Input
FBLIN
(Fig. 4–9)
This pin is used to switch the RGB outputs to the external
analog RGB inputs.
Pin 34 – NC
Pin 35...39 – Picture Bus OSD
OSD0...OSD4
(Fig. 4–11)
The Picture Bus OSD lines carry the digital OSD color
data. They are used as address for the color lookup
table.
Pin 40 – Deflection Data Interface
FPDAT
(Fig.4–6 )
This is the bidirectional interface to the fast processor in
the VPC for deflection data calculation.
Pin 41,42,43 – Picture Bus Priority
PR2–PR0
(Fig. 4–6)
The Picture Bus Priority lines carry the digital priority
selection signals. The priority interface allows digital
switching of up to 8 sources to the backend processor.
Switching for different sources is prioritized and can be
done from pixel to pixel.
Pin 44...51 Picture Bus Chroma
C0...C7
(Fig. 4–11)
The Picture Bus Chroma lines carry the digital chromi-
nance data. The data are sampled at 20.25 MHz and
multiplexed C
B
C
R
.
Pin 52 – Supply Voltage, Digital Circuitry
VSUPD
Pin 53 – Ground, Digital Circuitry
GNDD
Pin 54 – Main Clock Input
CLK20
(Fig. 4–8)
This is the 20.25 MHz main system clock that is used by
all circuits in a high-end VPC system.
Pin 55...60, 62, 63 – Picture Bus Luma
L0...L7
(Fig. 4–11)
The Picture Bus Luma lines carry the digital luminance
data. The data are sampled at 20.25 MHz.
Pin 61 – NC
Pin 64 – NC
Pin 65 – Ground, Digital Circuitry Input Reference
GNDD
Pin 66 – NC
Pin 67 – Supply Voltage, Output Pin Driver
VSUPP
This pin is used as supply for the following digital output
pins : CSY, MSY.
Pin 68 – Composite Sync Output
CSY
(Fig. 4–5)
This output supplies a standard composite sync signal
that is compatible to the analog RGB output signals.
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