參數(shù)資料
型號(hào): DAC1627D1G25
廠商: NXP SEMICONDUCTORS
元件分類(lèi): DAC
中文描述: PARALLEL, WORD INPUT LOADING, 0.02 us SETTLING TIME, 16-BIT DAC, PQCC72
封裝: 10 X 10 MM, 0.85 MM HEIGHT, PLASTIC, SOT813-3, HVQFN-72
文件頁(yè)數(shù): 47/69頁(yè)
文件大?。?/td> 1677K
代理商: DAC1627D1G25
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Page 1 register allocation map
…continued
Register name
R/W
Bit 7
Bit 6
Bit 5
D
A
O
R
4
N
D
D
[1]
u = undefined at power-up or after reset.
17
11h
DAC_CURRENT_2
R/W
-
-
-
-
DAC_DRV_BIAS[3:0]
0000
0011
0000
0011
0000
0011
0000
0011
0000
0011
1011
1011
03h
18
12h
DAC_CURRENT_3
R/W
-
-
-
-
DAC_SLV_BIAS[3:0]
03h
19
13h
DAC_CURRENT_4
R/W
-
-
-
-
DAC_CK_BIAS[3:0]
03h
20
14h
DAC_CURRENT_5
R/W
-
-
-
-
DAC_CAS_BIAS[3:0]
03h
21
15h
DAC_CURRENT_6
R/W
-
-
-
-
DAC_BLD_BIAS[3:0]
03h
22
16h
DAC_PON_SLEEP
R/W
DAC_B_
PON
DAC_B_
SLEEP
DAC_B_
COM_PD
DAC_B_
BLEED_
PD
-
DAC_A_
PD
DAC_A_
SLEEP
DAC_A_
COM_PD
DAC_A_
BLEED_
PD
BBh
23
17h
DAC_CLKDIG_DELAY
R/W
-
-
-
-
PLL_DIG_DELAY[2:0]
0000
0010
0000
0000
02h
31
1Fh
PAGE_ADDRESS
R/W
-
-
-
-
-
PAGE[2:0]
00h
Table 55.
Address
Bit definition
Bit 4
Default
[1]
Bin
Bit 3
Bit 2
Bit 1
Bit 0
Hex
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