參數(shù)資料
型號(hào): DAC1627D1G25
廠商: NXP SEMICONDUCTORS
元件分類: DAC
中文描述: PARALLEL, WORD INPUT LOADING, 0.02 us SETTLING TIME, 16-BIT DAC, PQCC72
封裝: 10 X 10 MM, 0.85 MM HEIGHT, PLASTIC, SOT813-3, HVQFN-72
文件頁(yè)數(shù): 25/69頁(yè)
文件大?。?/td> 1677K
代理商: DAC1627D1G25
DAC1627D1G25
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Objective data sheet
Rev. 1 — 29 April 2011
25 of 69
NXP Semiconductors
DAC1627D1G25
Dual 16-bit DAC: up to 1.25 Gsps; x2, x4 and x8 interpolating
10.9 Single SideBand Modulator (SSBM)
The SSBM is a quadrature modulator that enables mixing the I data and Q data with the
sine and cosine signals generated by the NCO to generate path A and path B
(see
Figure 19
).
The frequency of the NCO is programmed over 40 bits. NCO enables inverting the sine
component to operate a positive or negative, lower or upper SSB upconversion
(see register TXCFG in
Table 25
).
10.9.1
NCO in 40 bits
When using NCO, the frequency can be set over 40 bits by five registers, FREQNCO_B0
to FREQNCO_B4 (see
Table 27
to
Table 31
).
The frequency is calculated with
Equation 1
.
(1)
H(6)
H(5)
H(4)
H(3)
H(2)
H(1)
H(0)
H(22)
H(23)
H(24)
H(25)
H(26)
H(27)
H(28)
773
456
252
128
58
22
6
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Table 15: Interpolation filter coefficients
…continued
First interpolation filter
Lower
Upper
Value
Second interpolation filter
Lower
Upper
Third interpolation filter
Lower
Upper
Value
Value
Fig 19. SSBM principle
001aan575
+/
cos
A
B
I
sin
+/
sin
Q
cos
+/
f
NCO
M
--------------
f
s
×
2
=
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