參數(shù)資料
型號: DAC1627D1G25
廠商: NXP SEMICONDUCTORS
元件分類: DAC
中文描述: PARALLEL, WORD INPUT LOADING, 0.02 us SETTLING TIME, 16-BIT DAC, PQCC72
封裝: 10 X 10 MM, 0.85 MM HEIGHT, PLASTIC, SOT813-3, HVQFN-72
文件頁數(shù): 4/69頁
文件大?。?/td> 1677K
代理商: DAC1627D1G25
DAC1627D1G25
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Objective data sheet
Rev. 1 — 29 April 2011
4 of 69
NXP Semiconductors
DAC1627D1G25
Dual 16-bit DAC: up to 1.25 Gsps; x2, x4 and x8 interpolating
6. Pinning information
6.1 Pinning
6.2 Pin description
Table 2.
Symbol
CLKP
CLKN
MDSP
MDSN
TM
ALIGNP
ALIGNN
LD[15]P
LD[15]N
Fig 2.
Pin configuration
001aan828
DAC1627D1G25
Transparent top view
LD[4]N
LD[4]P
LD[12]N
LD[11]P
LD[11]N
LD[3]P
LD[12]P
LD[3]N
LD[13]N
LD[2]P
LD[13]P
LD[2]N
V
DDD(1V8)
V
DDD(1V8)
LD[14]N
LD[1]P
LD[14]P
LD[1]N
LD[15]N
LD[0]P
LD[15]P
LD[0]N
ALIGNN
IO1
ALIGNP
IO0
TM
SDO
MDSN
SDIO
MDSP
SCLK
CLKN
SCS_N
L
L
L
L
L
L
V
D
L
L
G
L
L
L
L
L
L
I
I
V
D
V
D
A
A
V
D
G
V
V
D
A
A
V
D
V
D
I
I
CLKP
RESET_N
V
D
V
D
V
D
V
D
17
18
38
37
16
39
15
40
14
41
13
42
12
43
11
44
10
45
9
46
8
47
7
48
6
49
5
50
4
51
3
52
2
1
53
54
7
7
7
6
6
6
6
6
6
6
6
6
6
5
5
5
5
5
2
1
2
2
2
2
2
2
2
2
2
3
3
3
3
3
3
3
terminal 1
index area
Pin description
Pin
1
2
3
4
5
6
7
8
9
Type
[1]
I
I
IO
IO
I
I
I
I
I
Description
DAC clock positive input
DAC clock negative input
multi-device synchronization positive signal
multi-device synchronization negative signal
Test mode selection (connect to GND)
positive input for data alignment
negative input for data tanglement
LVDS positive input bit 15
[2]
LVDS negative input bit 15
[2]
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DAC1627D1G25/DB,598 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開發(fā)工具 DAC DEMOBOARD RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V
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DAC1627D1G25HN/C1,551 功能描述:調(diào)節(jié)器/解調(diào)器 Dual 16-bit DAC, up to 1.25 Gsps RoHS:否 制造商:Texas Instruments 封裝 / 箱體:PVQFN-N24 封裝:Reel
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