
CYNCP80192
Document #: 38-02043 Rev. *B
Page 20 of 42
Processor ID[4:0]
. The processor ID from the command descriptor is identified here.
Context ID[4:0]
. The context ID from the command descriptor is identified here.
Done
. This field indicates that the Read operation is complete. When the done bit is set, the next command can be written in the
descriptor. The done bit is cleared when the Result Register 0 is Read by the network processor.
SE Data[3:0]
. This field contains the least four significant bits (layer attribute/valid bits) Read from the NSE 68-bit word. (This
field is valid only when Reads are done from the NSE.)
Result Register 1 contains the SE Data[67:4] Read from the NSE
(
Table 7-12
) or Data[63:0] Read from the SSRAM connected
to the NSE (
Table 7-13
).
7.3.5
Only Result Register 0 carries meaningful data, as is shown in
Table 7-14
below.
Result Register 0 and 1 for Write/Move/Swap/Learn Operations
Done
. This field indicates that the command has been processed. When the done bit is set, the next command can be written in
the descriptor. The done bit is cleared when the Result Register 0 is Read by the network processor.
Result Register 1 is not used for Write/Move/Swap/Learn commands.
7.3.6
For the search operation where an SSRAM is connected to the NSE (Figure 7), the Result Register 0 carries search status,
processor ID and context ID and is shown in
Table 7-15
. The associative data is returned in Result Register 1 if the search
succeeded, as shown in
Table 7-16
. In addition, if the search result in data field bit in the CFG register is set, then bit[63] of Result
Register 1 indicates a search success (bit[63] = 1) or search failure (bit[63] = 0). In this case bits 62–0 contain the 63-bit associative
data from the SSRAM, as is shown in
Table 7-17
.
Result Register 0 and 1 for Search Operation (Case 1)
23–16
15–8
7–0
Reserved
Reserved
Reserved
SE Data[3:0]
Table 7-12. Data Read from NSE
ADR
Result 1
63–0
SE Data[67:4]
Table 7-13. Data Read from SSRAM
ADR
Result 1
63–0
SSRAM Data[63:0]
Table 7-14. Write/Move/Swap/Learn Results Register 0
Bit Positions
Associative Data SSRAM Connected to Coprocessor Bus
5
4
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
7
6
3
2
1
0
63–56
55–48
47–40
39–32
31–24
23–16
15–8
7–0
Reserved
Reserved
Done
Table 7-11. Read Response at Result Register 0
(continued)
Bit Positions
Associative Data SSRAM Connected to Coprocessor Bus