
Master Bus Operation
3-4
ColdFire2/2M User’s Manual
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MOTOROLA
3.1.16 Master Write Data Bus (MWDATA[31:0])
These output signals provide the write data path between the ColdFire2/2M and the system.
The write data bus is 32-bits wide and can transfer 8, 16 or 32 bits of data per bus transfer.
During a line transfer, the data bus is time-multiplexed across multiple clock cycles to carry
128 bits.
3.1.17 Master Write Data Output Enable (MWDATAOE)
This active high output signal indicates that the ColdFire2/2M is driving the master write data
bus. This is used to control optional bidirectional data bus three-state drivers.
3.2 DATA TRANSFER MECHANISM
3.2.1 Transfer Type Control Signals
The transfer type control signals indicate the type of bus transaction occurring on the master
bus. This includes the master transfer type (
MTT
[1:0]) and master transfer modifier
(
MTM
[2:0]) signals. The MTT[1:0] signals indicates the type of transfer and the MTM[2:0]
signals provide supplemental information. The encodings for MTT[1:0] and MTM[2:0] are
shown in
Table 3-3
and
Table 3-4
. The transfer type attributes for accesses made through
the debug module are determined by the programming of the debug module (see
7.4.2.2 Address Attribute Register (AATR)
).
Section
3.2.1.1 COLDFIRE2/2M ACCESS.
drives the
MTT
[1:0] signals with a ColdFire2/2M access encoding. The
MTM
[2:0] encoding
will depend on the privilege mode and address space of the transfer:
If the ColdFire2/2M requests a master bus transfer, it
Privilege Mode—Supervisor/User Mode Access
When the supervisor (S) bit in the status register (
SR
) is set, the ColdFire2/2M will drive
MTM
[2:0] with one of the supervisor mode encodings during a master bus transfer. When
the S bit in the SR is clear, the ColdFire2/2M will drive MTM[2:0] with one of the user mode
access encodings.
Address Space—Code/Data Access
If the ColdFire2/2M accesses the code space, it will drive
MTM
[2:0] with one of the code
access encodings during a master bus transfer. Code space accesses are opcode fetches
or operand fetches in one of the PC relative addressing modes. If the ColdFire2/2M
accesses the data space, it will drive MTM[2:0] with one of the data access encodings. Data
Table 3-4. Master Bus Transfer Type Encoding
MTT[1:0]
00
01
10
11
NOTES: 1.
COLDFIRE IACK MODE
ColdFire2/2M Access
Alternate Master Access
Emulator Mode Access
Acknowledge/CPU Space Access
68K interrupt acknowledge mode signal negated (IACK_68K = 0)
68K interrupt acknowledge mode signal asserted (IACK_68K = 1)
1
68K IACK MODE
2
Acknowledge/CPU Space/ColdFire2/2M Access
Alternate Master Access
Emulator Mode Access
Reserved
2.
F
Freescale Semiconductor, Inc.
n
.