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參數(shù)資料
| 型號： | Celeron Processor with mobile |
| 廠商： | Intel Corp. |
| 英文描述： | Celeron Processor Mobile Module MMC-1 at 400 MHz, 366 MHz, 333 MHz, and 300 MHz(工作頻率400,366,333,300和266兆赫茲帶移動模塊和連接器1處理器) |
| 中文描述： | 賽揚處理器的移動模塊絲裂霉素在400兆赫，366兆赫，333兆赫和300兆赫1（工作頻率四千〇三億六千六百三十三萬三千三百和266兆赫茲帶移動模塊和連接器1處理器） |
| 文件頁數(shù)： | 29/42頁 |
| 文件大?。?/td> | 449K |
| 代理商： | CELERON PROCESSOR WITH MOBILE |
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29
Intel
a
Celeron
Processor Mobile Module MMC-1
At 400 MHz, 366 MHz, 333 MHz, and 300 MHz
Table 20. VR_ON In-rush Current
Instantaneous
MAX
41.0 mA
DC Operating
0.1
μ
A
0.0
μ
A
TYP
0.2 mA
NOTE:
These values are based on a 3.3V VR_ON signal.
8.
VR_ON Valid-Low Time: This specifies how long VR_ON needs to be low for a valid off before VR_ON can be
turned back on again. In going from a valid on to off and then back on, the following conditions must be met to
prevent damage to the OEM system or the Intel mobile module:
VR_ON must be low for 1 millisecond.
The original voltage level requirements for turn-on must be met before assertion of VR_ON (i.e. V_DC
≥
4.7
volts, V_5
≥
4.5 volts, and V_3
≥
3.0 volts).
POWER SEQUENCE TIMING
V_DC
1. PWROK on I/O board should be active on when VR_PWRGD is active and V_3S is good.
2. CPU_RST from I/O board should be active for a minimum of 6 ms after PWROK is active and PLL_STP# and CPU_STP# are
inactive. Note that PLL_STP# is an AND condition of RSMRST# and SUSB# on the PIIX4E/M.
3. V_DC >= 4.7V, V_5>=4.5V, V_3S>=3.0V.
4. V_CPUPU and V_CLK are generated on the Intel Mobile Module.
5. This is the 5V power supplied to the processor module connector. This should be the first 5V plane to power up.
6. VR_PWRGD is specified to its associated high/active by the module regulator within less than or equal to 6 ms max. after the
assertion of VR_ON.
Figure 5. Power-on Sequence Timing
V_3
V_5
VR_PWRGD
V_3S
VR_ON
0 MS MIN
0 MS MIN
0 MS MIN
6
3
V_CPUPU/
V_CLK
5
4.7.3
Power Planes: Bulk Capacitance
Requirements
In order to provide adequate filtering and in-rush current
protection for any system design, bulk capacitance is
required. A small amount of bulk capacitance is supplied on
the module. However, in order to achieve proper filtering
additional capacitance should be placed on the system
electronics.
Table 21 details the bulk capacitance requirements for the
system electronics.
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