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參數(shù)資料
| 型號： | CDB8420 |
| 廠商： | Cirrus Logic Inc |
| 文件頁數(shù)： | 63/94頁 |
| 文件大?。?/td> | 0K |
| 描述： | EVALUATION BOARD FOR CS8420 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 主要目的： | 音頻，采樣率轉(zhuǎn)換器 |
| 嵌入式： | 是，MCU，8 位 |
| 已用 IC / 零件： | CS8420 |
| 主要屬性： | 帶數(shù)字音頻發(fā)射器和接收器的采樣率轉(zhuǎn)換器 |
| 次要屬性： | 44.1、48、96 kHz 輸出采樣率，AES/EBU，S/PDIF，EIAJ-340，GUI |
| 已供物品： | 板 |
| 相關(guān)產(chǎn)品： | 598-1125-5-ND - IC SAMPLE RATE CONVERTER 28SOIC |
| 其它名稱： | 598-1782 |
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DS245F4
CS8420
OLRCK - Serial Audio Output Port Left/Right Clock Input or Output
Word rate clock for the audio data on the SDOUT pin. The frequency will be at the output sample rate (Fso).
AES3/SPDIF Transmitter Interface:
TXN, TXP - Differential Line Driver Outputs
Differential line driver outputs, transmitting AES3 type data. Drivers are pulled to low while the CS8420 is in the reset
state.
TCBL - Transmit Channel Status Block Start
When operated as output, TCBL is high during the first sub-frame of a transmitted channel status block, and low at
all other times. When operated as input, driving TCBL high for at least three OMCK clocks will cause the current
transmitted sub-frame to be the start of a channel status block.
AES3/SPDIF Receiver Interface:
RXP, RXN - Differential Line Receiver Inputs
Differential line receiver inputs, carrying AES3 type data.
RMCK - Input Section Recovered Master Clock Output
Input section recovered master clock output. Will be at a frequency of 256x the input sample rate (Fsi). This is also
a start-up option pin, and requires a pull-up or pull-down resistor.
RERR - Receiver Error Indicator Output
When high, indicates a problem with the operation of the AES3 receiver. The status of this pin is updated once per
sub-frame of incoming AES3 data. Conditions that cause RERR to go high are: parity error, and bi-phase coding
error, as well as loss of lock in the PLL. This is also a start-up option pin, and requires a pull-up or pull-down resistor.
EMPH/U - Pre-emphasis Indicator Output or U-Bit Data Input
The EMPH/U pin either reflects the state of the EMPH channel status bits in the incoming AES3 type data stream,
or is the serial U-bit input for the AES3 type transmitted data, clocked by OLRCK. If indicating emphasis EMPH/U
is low when the incoming data indicates 50/15
μs pre-emphasis and high otherwise.
COPY - Copy Channel Status Bit Output
The COPY pin reflects the state of the COPY Channel Status bit in the incoming AES3 type data stream. This is
also a start-up option pin, and requires a pull-up or pull-down resistor.
ORIG - Original Channel Status Output
SCMS generation indicator. This is decoded from the incoming category code and the L bit. A low output indicates
that the audio data stream is 1st generation or higher. A high indicates that the audio data stream is original. This is
also a start-up option pin, and requires a pull-up or pull-down resistor.
PRO/C - Professional Channel Status Bit Output or C-Bit Data Input
The PRO/C pin either reflects the state of the Professional/Consumer Channel Status bit in the incoming AES3 type
data stream, or is the serial C-bit input for the AES3 type transmitted data, clocked by OLRCK.
AUDIO/V - Audio Channel Status Bit Output or V-Bit Data Input
The AUDIO/V pin either reflects the state of the audio/non audio Channel Status bit in the incoming AES3 type data
stream, or is the V-bit data input for the AES3 type transmitted data stream, clocked by OLRCK.
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