參數(shù)資料
型號(hào)： CDB8420
廠商： Cirrus Logic Inc
文件頁(yè)數(shù)： 51/94頁(yè)
文件大小： 0K
描述： EVALUATION BOARD FOR CS8420
標(biāo)準(zhǔn)包裝： 1
主要目的： 音頻，采樣率轉(zhuǎn)換器
嵌入式： 是，MCU，8 位
已用 IC / 零件： CS8420
主要屬性： 帶數(shù)字音頻發(fā)射器和接收器的采樣率轉(zhuǎn)換器
次要屬性： 44.1、48、96 kHz 輸出采樣率，AES/EBU，S/PDIF，EIAJ-340，GUI
已供物品： 板
相關(guān)產(chǎn)品： 598-1125-5-ND - IC SAMPLE RATE CONVERTER 28SOIC
其它名稱： 598-1782
DS245F4
55
CS8420
13. HARDWARE MODES
13.1
Overall Description
The CS8420 has six Hardware modes, which allow use of the device without using a micro-controller to ac-
cess the device control registers and CS & U data. The flexibility of the CS8420 is necessarily limited in
Hardware mode. Various pins change function in Hardware mode, and various data paths are also possible.
These alternatives are identified by Hardware mode numbers 1 through 6. The following sections describe
the data flows and pin definitions for each Hardware mode.
13.1.1
Hardware Mode Definitions
Hardware mode is selected by connecting the H/S pin to ‘1’. In Hardware mode, 3 pins (DFC0, DFC1 &
S/AES) determine the Hardware mode number, according to Table 5. Start-up options are used exten-
sively in Hardware mode. Options include whether the serial audio output ports are master or slave, the
serial audio ports’ format and whether TCBL is an input or an output. Which output pins are used to set
which modes depends on which Hardware mode is being used.
13.1.2
Serial Audio Port Formats
In Hardware mode, only a limited number of alternative serial audio port formats are available. These for-
mats are described by Tables 6 and 7, which define the equivalent Software mode bit settings for each
format. Timing diagrams are shown in Figures 17 and 18.
For each Hardware mode, the following pages contain a data flow diagram, a pin-out drawing, a pin de-
scriptions list and a definition of the available start-up options.
DFC1 DFC0 S/AES
Hardware Mode Number
0
1 - Default Data Flow, AES3 input
0
1
2 - Default Data Flow, serial input
0
1
-
3 - Transceive Flow, with SRC
1
0
-
4 - Transceive Flow, no SRC
1
0
5 - AES3 Rx only, AES3 input
1
6 - AES3 Tx only, serial input
Table 5. Hardware Mode Definitions
SOSF
SORES1/0
SOJUST
SODEL
SOSPOL
SOLRPOL
OF1 - Left-Justified
0
00
0
1
0
OF2 - IS 24-bit data
0
00
0
1
0
1
OF3 - Right-Justified, Master
mode only
000
1
0
OF4 - IS 16-bit data
0
10
0
1
0
1
OF5 - Direct AES3 data
0
11
0
1
0
Table 6. Serial Audio Output Formats Available in Hardware Mode
SISF
SIRES1/0
SIJUST
SIDEL
SISPOL
SILRPOL
IF1 - Left-Justified
0
00
0
1
0
IF2 - IS
0
00
0
1
0
1
IF3 - Right-Justified 24-bit data
0
00
1
0
IF4 - Right-Justified 16-bit data
0
10
1
0
Table 7. Serial Audio Input Formats Available in Hardware Mode
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