參數(shù)資料
型號: ATMEGA103-6AI
廠商: Atmel
文件頁數(shù): 64/141頁
文件大?。?/td> 0K
描述: IC MCU 128K 6MHZ A/D IT 64TQFP
產(chǎn)品培訓(xùn)模塊: megaAVR Introduction
標(biāo)準包裝: 90
系列: AVR® ATmega
核心處理器: AVR
芯體尺寸: 8-位
速度: 6MHz
連通性: SPI,UART/USART
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 32
程序存儲器容量: 128KB(64K x 16)
程序存儲器類型: 閃存
EEPROM 大小: 4K x 8
RAM 容量: 4K x 8
電壓 - 電源 (Vcc/Vdd): 4 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 64-TQFP
包裝: 托盤
配用: ATSTK501-ND - ADAPTER KIT FOR 64PIN AVR MCU
29
ATmega103(L)
0945I–AVR–02/07
Watchdog Reset
When the Watchdog times out, it will generate a short reset pulse of 1 XTAL cycle dura-
tion. On the falling edge of this pulse, the delay timer starts counting the Time-out period
t
TOUT. Refer to page 55 for details on operation of the Watchdog.
Figure 27. Watchdog Reset during Operation
MCU Status Register –
MCUSR
The MCU Status Register provides information on which reset source caused an MCU
reset.
Bits 7..2 – Res: Reserved Bits
These bits are reserved bits in the ATmega103(L) and always read as zero.
Bit 1 – EXTRF: External Reset Flag
After a Power-on Reset, this bit is undefined (X). It will be set by an external reset. A
Watchdog reset will leave this bit unchanged.
Bit 0 – PORF: Power-on Reset Flag
This bit is set by a Power-on Reset. A Watchdog Reset or an External Reset will leave
this bit unchanged.
To summarize, Table 7 shows the value of these two bits after the three modes of reset:
To make use of these bits to identify a reset condition, the user software should clear
both the PORF and EXTRF bits as early as possible in the program. Checking the
PORF and EXTRF values is done before the bits are cleared. If the bit is cleared before
VCC
RESET
TIME-OUT
INTERNAL
RESET
WDT
TIME-OUT
1 XTAL Cycle
t
TOUT
Bit
7
65
43
21
0
$34 ($54)
EXTRF
PORF
MCUSR
Read/Write
R
R/W
Initial Value
0
See bit description
Table 7. PORF and EXTRF Values after Reset
Reset Source
EXTRF
PORF
Power-on Reset
undefined
1
External Reset
1
unchanged
Watchdog Reset
unchanged
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