
Am79C978A
Index-3
Logical Address Filter 2 122
CSR11
Logical Address Filter 3 123
CSR12
Physical Address Register 0 123
CSR13
Physical Address Register 1 123
CSR14
Physical Address Register 2 123
CSR15
Mode 124
CSR16
Initialization Block Address Lower 125
CSR17
Initialization Block Address Upper 125
CSR18
Current Receive Buffer Address Lower 125
CSR19
Current Receive Buffer Address Upper 126
CSR20
Current Transmit Buffer Address Lower 126
CSR21
Current Transmit Buffer Address Upper 126
CSR22
Next Receive Buffer Address Lower 126
CSR23
Next Receive Buffer Address Upper 126
CSR24
Base Address of Receive Ring Lower 126
CSR25
Base Address of Receive Ring Upper 126
CSR26
Next Receive Descriptor Address Lower 127
CSR27
Next Receive Descriptor Address Upper 127
CSR28
Current Receive Descriptor Address Lower 127
CSR29
Current Receive Descriptor Address Upper 127
CSR30
Base Address of Transmit Ring Lower 127
CSR31
Base Address of Transmit Ring Upper 127
CSR32
Next Transmit Descriptor Address Lower 127
CSR33
Next Transmit Descriptor Address Upper 128
CSR34
Current Transmit Descriptor Address Lower 128
CSR35
Current Transmit Descriptor Address Upper 128
CSR36
Next Next Receive Descriptor Address Lower 128
CSR37
Next Next Receive Descriptor Address Upper 128
CSR38
Next Next Transmit Descriptor Address Lower 128
CSR39
Next Next Transmit Descriptor Address Upper 129
CSR40
Current Receive Byte Count 129
CSR41
Current Receive Status 129
CSR42
Current Transmit Byte Count 129
CSR43
Current Transmit Status 129
CSR44
Next Receive Byte Count 129
CSR45
Next Receive Status 130
CSR46
Transmit Poll Time Counter 130
CSR47
Transmit Polling Interval 130
CSR48
Receive Poll Time Counter 130
CSR49
Receive Polling Interval 131
CSR58
Software Style 131
CSR60
Previous Transmit Descriptor Address Lower 133
CSR61
Previous Transmit Descriptor Address Upper 133
CSR62
Previous Transmit Byte Count 133
CSR63
Previous Transmit Status 133
CSR64
Next Transmit Buffer Address Lower 134
CSR65
Next Transmit Buffer Address Upper 134
CSR66
Next Transmit Byte Count 135
CSR67
Next Transmit Status 134
CSR72
Receive Ring Counter 134
CSR74
Transmit Ring Counter 134
CSR76
Receive Ring Length 135
CSR78
Transmit Ring Length 135
CSR80
DMA Transfer Counter and FIFO Threshold Con-
trol 135
CSR82
Transmit Descriptor Address Pointer Lower 137
CSR84
DMA Address Register Lower 137
CSR85
DMA Address Register Upper 138