參數(shù)資料
型號(hào): AM79C978AKCW
廠商: ADVANCED MICRO DEVICES INC
元件分類: 微控制器/微處理器
英文描述: Single-Chip 1/10 Mbps PCI Home Networking Controller
中文描述: 5 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP160
封裝: PLASTIC, QFP-160
文件頁數(shù): 157/256頁
文件大?。?/td> 3505K
代理商: AM79C978AKCW
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁當(dāng)前第157頁第158頁第159頁第160頁第161頁第162頁第163頁第164頁第165頁第166頁第167頁第168頁第169頁第170頁第171頁第172頁第173頁第174頁第175頁第176頁第177頁第178頁第179頁第180頁第181頁第182頁第183頁第184頁第185頁第186頁第187頁第188頁第189頁第190頁第191頁第192頁第193頁第194頁第195頁第196頁第197頁第198頁第199頁第200頁第201頁第202頁第203頁第204頁第205頁第206頁第207頁第208頁第209頁第210頁第211頁第212頁第213頁第214頁第215頁第216頁第217頁第218頁第219頁第220頁第221頁第222頁第223頁第224頁第225頁第226頁第227頁第228頁第229頁第230頁第231頁第232頁第233頁第234頁第235頁第236頁第237頁第238頁第239頁第240頁第241頁第242頁第243頁第244頁第245頁第246頁第247頁第248頁第249頁第250頁第251頁第252頁第253頁第254頁第255頁第256頁
Am79C978A
157
Table 38.
PHY Select Programming
These bits are read accessible al-
ways, these bits can only be writ-
ten from the EEPROM unless a
write-enable bit, BCR2[13], is set.
PHYSEL [1:0] is cleared by
H_RESET and is not affected by
S_RESET or STOP.
2-0
LINBC
Reserved locations. These bits
are read accessible always; write
accessible only when either the
STOP or the SPND bit is set. Af-
ter H_RESET, the value in these
bits will be 001b. The setting of
these bits have no effect on any
Am79C978A controller
s func-
tion. LINBC is not affected by
S_RESET or STOP.
BCR19: EEPROM Control and Status
Bit
Name
Description
31-16 RES
Reserved locations. Written as
zeros and read as undefined.
15
PVALID
EEPROM Valid status bit. This bit
is read accessible only. PVALID
is read only; write operations
have no effect. A value of 1 in this
bit indicates that a PREAD opera-
tion has occurred, and that (1)
there is an EEPROM connected
to the Am79C978A controller in-
terface pins and (2) the contents
read from the EEPROM have
passed the checksum verification
operation.
A value of 0 in this bit indicates a
failure in reading the EEPROM.
The checksum for the entire 82
bytes of EEPROM is incorrect or
no EEPROM is connected to the
interface pins.
PVALID is set to 0 during
H_RESET and is unaffected by
S_RESET or the STOP bit. How-
ever, following the H_RESET op-
eration, an automatic read of the
EEPROM will be performed. Just
as it is true for the normal PREAD
command, at the end of this auto-
matic read operation the PVALID
bit may be set to 1. Therefore,
H_RESET will set the PVALID bit
to 0 at first, but the automatic EE-
PROM read operation may later
set PVALID to a 1.
If PVALID becomes 0 following an
EEPROM read operation (either
automatically
generated
H_RESET, or requested through
PREAD), then all EEPROM-pro-
grammable BCR locations will be
reset to their H_RESET values.
The content of the Address
PROM locations, however, will not
be cleared.
after
If no EEPROM is present at the
EESK, EEDI, and EEDO pins,
then all attempted PREAD
commands will terminate early
and PVALID will
not
be set.
This applies to the automatic
read of the EEPROM after
H_RESET, as well as to host-
initiated PREAD commands.
14
PREAD
EEPROM Read command bit.
When this bit is set to a 1 by the
host, the PVALID bit (BCR19, bit
15) will immediately be reset to a
0, and then the Am79C978A con-
troller will perform a read opera-
tion of 82 bytes from the
EEPROM through the interface.
The EEPROM data that is
fetched during the read will be
stored in the appropriate internal
registers on board the controller.
Upon completion of the EEPROM
read operation, the Am79C978A
controller will assert the PVALID
bit. EEPROM contents will be in-
directly accessible to the host
through read accesses to the Ad-
dress PROM (offsets 0h through
Fh) and through read accesses to
other EEPROM programmable
registers. Note that read access-
es from these locations will not
actually access the EEPROM it-
self, but instead will access the
Am79C978A internal copy of the
EEPROM
contents.
Write
PHYSEL [1:0]
00
01
10
11
Mode
Expansion ROM/Flash
EADI/Internal MII Snoop
Reserved
Reserved
相關(guān)PDF資料
PDF描述
AM79C978AVCW Single-Chip 1/10 Mbps PCI Home Networking Controller
AM79C978 Single-Chip 1/10 Mbps PCI Home Networking Controller
AM79C981 Integrated Multiport Repeater Plus⑩ (IMR+⑩)
AM79C981JC Integrated Multiport Repeater Plus⑩ (IMR+⑩)
AM79C982 basic Integrated Multiport Repeater (bIMR)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AM79C978AVCW 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Single-Chip 1/10 Mbps PCI Home Networking Controller
AM79C978KC/W 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Single-Chip 1/10 Mbps PCI Home Networking Controller
AM79C978VC/W 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Single-Chip 1/10 Mbps PCI Home Networking Controller
AM79C979BKC\\W 制造商:Advanced Micro Devices 功能描述:
AM79C98 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Twisted-Pair Ethernet Transceiver (TPEX)