參數(shù)資料
型號(hào)： AM79C978AKCW
廠商： ADVANCED MICRO DEVICES INC
元件分類(lèi)： 微控制器/微處理器
英文描述： Single-Chip 1/10 Mbps PCI Home Networking Controller
中文描述： 5 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP160
封裝： PLASTIC, QFP-160
文件頁(yè)數(shù)： 176/256頁(yè)
文件大?。?/td> 3505K
代理商： AM79C978AKCW
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176
Am79C978A
Am79C978A controller is func-
tioning in a Link Pass state and
full-duplex operation is en-
abled. When the Am79C978A
controller is not functioning in
a Link Pass state with full-du-
plex operation being enabled,
a value of 0 is passed to the
LEDOUT signal.
This bit is always read/write ac-
cessible. FDLSE is cleared by
H_RESET and is not affected
by S_RESET or setting the
STOP bit.
7
PSE
Pulse Stretcher Enable. When
this bit is set, the LED illumination
time is extended for each new oc-
currence of the enabled function
for this LED output. A value of 0
disables the pulse stretcher.
This bit is always read/write ac-
cessible. PSE is set to 1 by
H_RESET and is not affected
by S_RESET or setting the
STOP bit.
6
LNKSE
Link Status Enable. When this bit
is set, a value of 1 will be passed
to the LEDOUT bit in this register
in Link Pass state.
This bit is always read/write ac-
cessible. LNKSE is cleared by
H_RESET and is not affected
by S_RESET or setting the
STOP bit.
5
RCVME
Receive Match Status Enable.
When this bit is set, a value of 1
is passed to the LEDOUT bit in
this register when there is re-
ceive activity on the network that
has passed the address match
function for this node. All ad-
dress matching modes are in-
cluded: physical, logical filtering,
broadcast, and promiscuous.
This bit is always read/write ac-
cessible. RCVME is cleared by
H_RESET and is not affected
by S_RESET or setting the
STOP bit.
4
XMTE
Transmit Status Enable. When
this bit is set, a value of 1 is
passed to the LEDOUT bit in this
register when there is transmit
activity on the network.
This bit is always read/write ac-
cessible. XMTE is cleared by
H_RESET and is not affected
by S_RESET or setting the
STOP bit.
3
POWER
Power. When this bit is set to 1,
the device is operating in HIGH
power mode.
2
RCVE
Receive Status Enable. When
this bit is set, a value of 1 is
passed to the LEDOUT bit in this
register when there is receive ac-
tivity on the network.
This bit is always read/write ac-
cessible. RCVE is set to 1 by
H_RESET and is not affected
by S_RESET or setting the
STOP bit.
1
SPEED
Speed. When this bit is set to 1,
the device is operating in HIGH
speed mode.
0
COLE
Collision Status Enable. When
this bit is set, a value of 1 is
passed to the LEDOUT bit in this
register when there is collision
activity on the network.
This bit is always read/write ac-
cessible. COLE is cleared by
H_RESET and is not affected
by S_RESET or setting the
STOP bit.
BCR49: PHY Select
This register defines which PHY will be able to send
and receive data over the MII interface. Bits 15:8 are
updated whenever the EEPROM is read, and bits 6:0
are updated
only
if bit 7 is cleared. The bits are defined
as follows:
Bit
Name
Description
15
PC_NET
PCnet mode. This bit must al-
ways be set.
14-10 RES
Reserved locations. These bits
must be written as zeros.
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AM79C978AVCW 制造商:AMD 制造商全稱(chēng):Advanced Micro Devices 功能描述:Single-Chip 1/10 Mbps PCI Home Networking Controller
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