
Am79C978A
147
8
FDLSE
Full-Duplex Link Status En-
able. Indicates the Full-Duplex
Link Test Status. When this bit
is set, a value of 1 is passed to
the LEDOUT signal when the
Am79C978A controller is func-
tioning in a Link Pass state and
full-duplex operation is en-
abled. When the Am79C978A
controller is not functioning in
a Link Pass state with full-du-
plex operation being enabled,
a value of 0 is passed to the
LEDOUT signal.
This bit is always read/write ac-
cessible. FDLSE is cleared by
H_RESET and is not affected by
S_RESET or setting the STOP bit.
7
PSE
Pulse Stretcher Enable. When
this bit is set, the LED illumination
time is extended for each new oc-
currence of the enabled function
for this LED output. A value of 0
disables the pulse stretcher.
This bit is always read/write ac-
cessible. PSE is set to 1 by
H_RESET and is not affected
by S_RESET or setting the
STOP bit.
6
LNKSE
Link Status Enable. When this bit
is set, a value of 1 will be passed
to the LEDOUT bit in this register
when in Link Pass state.
This bit is always read/write ac-
cessible. LNKSE is set to 1 by
H_RESET and is not affected
by S_RESET or setting the
STOP bit.
5
RCVME
Receive Match Status Enable.
When this bit is set, a value of 1 is
passed to the LEDOUT bit in this
register when there is receive ac-
tivity on the network that has
passed the address match func-
tion for this node. All address
matching modes are included:
physical, logical filtering, broad-
cast, and promiscuous.
This bit is always read/write ac-
cessible. RCVME is cleared by
H_RESET and is not affected
by S_RESET or setting the
STOP bit.
4
XMTE
Transmit Status Enable. When
this bit is set, a value of 1 is
passed to the LEDOUT bit in this
register when there is transmit
activity on the network.
This bit is always read/write ac-
cessible. XMTE is cleared by
H_RESET and is not affected
by S_RESET or setting the
STOP bit.
3
POWER
Power. When this bit is set to 1,
the device is operating in HIGH
power mode.
2
RCVE
Receive Status Enable. When
this bit is set, a value of 1 is
passed to the LEDOUT bit in this
register when there is receive ac-
tivity on the network.
This bit is always read/write ac-
cessible. RCVE is cleared by
H_RESET and is not affected
by S_RESET or setting the
STOP bit.
1
SPEED
Speed. When this bit is set to 1,
the device is operating in HIGH
speed mode.
0
COLE
Collision Status Enable. When
this bit is set, a value of 1 is
passed to the LEDOUT bit in this
register when there is collision
activity on the network.
This bit is always read/write ac-
cessible. COLE is cleared by
H_RESET and is not affected
by S_RESET or setting the
STOP bit.
BCR5: LED1 Status
BCR5 controls the function(s) that the LED1 pin dis-
plays. Multiple functions can be simultaneously en-
abled on this LED pin. The LED display will indicate the
logical OR of the enabled functions. BCR5 defaults to
Receive Status (RCV) with pulse stretcher enabled
(PSE = 1) and is fully programmable.
Note:
When LEDPE (BCR2, bit 12) is set to 1, pro-
gramming of the LED1 Status register is enabled.
When LEDPE is cleared to 0, programming of the