
Am79C978A
175
abled on this LED pin. The LED display will indicate the
logical OR of the enabled functions.
Note:
When LEDPE (BCR2, bit 12) is set to 1, pro-
gramming of the LED2 Status register is enabled.
When LEDPE is cleared to 0, programming of the
LED2 register is disabled. Writes to those registers will
be ignored.
Note:
Bits 15-0 in this register are programmable
through the EEPROM PREAD operation.
Bit
Name
Description
31-16 RES
Reserved locations. Written as
zeros and read as undefined.
15
LEDOUT
This bit indicates the current (non-
stretched) value of the LED output
pin. A value of 1 in this bit indi-
cates that the OR of the enabled
signals is true.
The logical value of the LEDOUT
status signal is determined by the
settings of the individual Status
Enable bits of the LED register
(bits 8 and 6-0).
Read accessible always. This bit
is read only; writes have no ef-
fect. LEDOUT is unaffected by
H_RESET, S_RESET, or STOP.
14
LEDPOL
LED Polarity. When this bit has
the value 0, then the LED pin will
be driven to a LOW level whenev-
er the OR of the enabled signals
is true, and the LED pin will be
disabled and allowed to float high
whenever the OR of the enabled
signals is false (i.e., the LED out-
put will be an Open Drain output
and the output value will be the
inverse of the LEDOUT status
bit).
When this bit has the value 1,
then the LED pin will be driven to
a HIGH level whenever the OR of
the enabled signals is true, and
the LED pin will be driven to a
LOW level whenever the OR of
the enabled signals is false (i.e.,
the LED output will be a Totem
Pole output and the output value
will be the same polarity as the
LEDOUT status bit).
The setting of this bit will not ef-
fect the polarity of the LEDOUT
bit for this register.
This bit is always read/write ac-
cessible. LEDPOL is cleared by
H_RESET and is not affected by
S_RESET or setting the STOP
bit.
13
LEDDIS
LED Disable. This bit is used to
disable the LED output. When
LEDDIS has the value 1, then the
LED output will always be dis-
abled. When LEDDIS has the val-
ue 0, then the LED output value
will be governed by the LEDOUT
and LEDPOL values.
This bit is always read/write ac-
cessible. LEDDIS is cleared by
H_RESET and is not affected
by S_RESET or setting the
STOP bit.
12
100E
100 Mbps Enable. When this bit
is set to 1, a value of 1 is passed
to the LEDOUT bit in this register
when the Am79C978A controller
is operating in 100 Mbps mode.
This bit is always read/write ac-
cessible. 100E is cleared by
H_RESET and is not affected by
S_RESET or setting the STOP
bit.
11-10 RES
Reserved locations. Written and
read as zeros.
9
MPSE
Magic Packet Status Enable.
When this bit is set to 1, a value of
1 is passed to the LEDOUT bit in
this register when Magic Packet
frame mode is enabled and a
Magic Packet frame is detected
on the network.
This bit is always read/write ac-
cessible. MPSE is cleared by
H_RESET and is not affected
by S_RESET or setting the
STOP bit.
8
FDLSE
Full-Duplex Link Status En-
able. Indicates the Full-Duplex
Link Test Status. When this bit
is set, a value of 1 is passed to
the LEDOUT signal when the