參數(shù)資料
型號： ADV7324
廠商： Analog Devices, Inc.
英文描述： Multiformat 216 MHz Video Encoder with Six NSV 14-Bit DACs
中文描述： 多格式視頻編碼器216兆赫六噪聲整形的14位DAC
文件頁數(shù)： 52/92頁
文件大小： 992K
代理商： ADV7324
ADV7324
SD Brightness Detect
[Subaddress 0x7A]
Rev. 0 | Page 52 of 92
The ADV7324 allows monitoring the brightness level of the
incoming video data. Brightness detect is a read-only register.
Double Buffering
[Subaddress 0x13, Bit 7; Subaddress 0x48, Bit 2]
Double-buffered registers are updated once per field upon the
falling edge of the Vsync signal. Double buffering improves the
overall performance, because modifications to register settings
will not be made during active video, but take effect upon the
start of the active video.
Double buffering can be activated on the following HD
registers: HD Gamma Curve A, HD Gamma Curve B, and HD
CGMS registers.
Double buffering can be activated on the following SD registers:
SD Gamma Curve A, SD Gamma Curve B, SD Y scale, SD U
scale, SD V scale, SD brightness, SD closed captioning, and SD
Macrovision (Bits 5 to 0).
NTSC WITHOUT PEDESTAL
NO SETUP
VALUE ADDED
POSITIVE SETUP
VALUE ADDED
100 IRE
0 IRE
NEGATIVE SETUP
VALUE ADDED
–7.5 IRE
+7.5 IRE
0
Figure 68. Examples of Brightness Control Values
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