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| 型號： | ADUC834BCPZ-REEL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 18/80頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU 62K FLASH ADC/DAC 56LFCSP |
| 標準包裝： | 2,500 |
| 系列： | MicroConverter® ADuC8xx |
| 核心處理器： | 8052 |
| 芯體尺寸： | 8-位 |
| 速度： | 12.58MHz |
| 連通性： | EBI/EMI，I²C，SPI，UART/USART |
| 外圍設(shè)備： | POR，PSM，PWM，溫度傳感器，WDT |
| 輸入/輸出數(shù)： | 34 |
| 程序存儲器容量： | 62KB（62K x 8） |
| 程序存儲器類型： | 閃存 |
| EEPROM 大?。?/td> | 4K x 8 |
| RAM 容量： | 2.25K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2.7 V ~ 5.25 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 3x16b，4x24b; D/A 1x12b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 56-VFQFN 裸露焊盤，CSP |
| 包裝： | 帶卷 (TR) |
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REV. A
ADuC834
–25–
Primary and Auxiliary ADC Inputs
The output of the primary ADC multiplexer feeds into a high
impedance input stage of the buffer amplifier. As a result, the pri-
mary ADC inputs can handle significant source impedances and
are tailored for direct connection to external resistive-type sensors
like strain gages or Resistance Temperature Detectors (RTDs).
The auxiliary ADC, however, is unbuffered, resulting in higher
analog input current on the auxiliary ADC. It should be noted
that this unbuffered input path provides a dynamic load to the
driving source. Therefore, resistor/capacitor combinations on
the input pins can cause dc gain errors depending on the output
impedance of the source that is driving the ADC inputs.
Analog Input Ranges
The absolute input voltage range on the primary ADC is restricted
to between AGND + 100 mV to AVDD – 100 mV. Care must be
taken in setting up the common-mode voltage and input voltage
range so that these limits are not exceeded; otherwise there will
be a degradation in linearity performance.
The absolute input voltage range on the auxiliary ADC is restricted
to between AGND – 30 mV to AVDD + 30 mV. The slightly
negative absolute input voltage limit does allow the possibility
of monitoring small signal bipolar signals using the single-ended
auxiliary ADC front end.
Programmable Gain Amplifier
The output from the buffer on the primary ADC is applied to the
input of the on-chip programmable gain amplifier (PGA). The
PGA can be programmed through eight different unipolar input
ranges and bipolar ranges. The PGA gain range is programmed
via the range bits in the ADC0CON SFR. With the external
reference select bit set in the ADC0CON SFR and an external
2.5 V reference, the unipolar ranges are 0 mV to 20 mV, 0 mV to
40 mV, 0 mV to 80 mV, 0 mV to 160 mV, 0 mV to 320 mV, 0 mV
to 640 mV, 0 V to 1.28 V, and 0 to 2.56 V; the bipolar ranges are
± 20 mV, ± 40 mV, ± 80 mV, ± 160 mV, ± 320 mV, ± 640 mV,
± 1.28 V, and ± 2.56 V. These are the nominal ranges that should
appear at the input to the on-chip PGA. An ADC range match-
ing specification of 2
V (typ) across all ranges means that
calibration need only be carried out at a single gain range and
does not have to be repeated when the PGA gain range is changed.
Typical matching across ranges is shown in Figure 9. Here, the
primary ADC is configured in bipolar mode with an external
2.5 V reference, while just greater than 19 mV is forced on its
inputs. The ADC continuously converts the dc input voltage at
an update rate of 5.35 Hz, i.e., SF = FFH. In total, 800 conver-
sion results are gathered. The first 100 results are gathered with
the primary ADC operating in the
± 20 mV range. The ADC
range is then switched to
± 40 mV, 100 more conversion results
are gathered, and so on until the last group of 100 samples is
gathered with the ADC configured in the
± 2.56 V range. From
Figure 9, the variation in the sample mean through each range,
i.e., the range matching, is seen to be of the order of 2 V.
The auxiliary ADC does not incorporate a PGA and is configured
for a fixed single input range of 0 to VREF.
0
100
200
300
400
500
600
700
800
SAMPLE COUNT
ADC
INPUT
VOLTAGE
–
mV
19.372
19.371
19.370
19.369
19.368
19.367
19.366
19.365
19.364
ADC RANGE
20mV
40mV
80mV
160mV
320mV
640mV
1.28V
2.56V
Figure 9. Primary ADC Range Matching
Bipolar/Unipolar Inputs
The analog inputs on the ADuC834 can accept either unipolar or
bipolar input voltage ranges. Bipolar input ranges do not imply that
the part can handle negative voltages with respect to system AGND.
Unipolar and bipolar signals on the AIN(+) input on the primary
ADC are referenced to the voltage on the respective AIN(–)
input. For example, if AIN(–) is 2.5 V and the primary ADC is
configured for an analog input range of 0 mV to 20 mV, the input
voltage range on the AIN(+) input is 2.5 V to 2.52 V. If AIN(–)
is 2.5 V and the ADuC834 is configured for an analog input
range of 1.28 V, the analog input range on the AIN(+) input is
1.22 V to 3.78 V (i.e., 2.5 V
± 1.28 V).
As mentioned earlier, the auxiliary ADC input is a single-ended
input with respect to the system AGND. In this context, a bipolar
signal on the auxiliary ADC can only span 30 mV negative with
respect to AGND before violating the voltage input limits for
this ADC.
Bipolar or unipolar options are chosen by programming the
primary and auxiliary Unipolar enable bits in the ADC0CON
and ADC1CON SFRs respectively. This programs the relevant
ADC for either unipolar or bipolar operation. Programming for
either unipolar or bipolar operation does not change any of the
input signal conditioning; it simply changes the data output coding
and the points on the transfer function where calibrations occur.
When an ADC is configured for unipolar operation, the output
coding is natural (straight) binary with a zero differential input
voltage resulting in a code of 000 . . . 000, a midscale voltage
resulting in a code of 100 . . . 000, and a full-scale input voltage
resulting in a code of 111 . . . 111. When an ADC is configured
for bipolar operation, the coding is offset binary with a negative
full-scale voltage resulting in a code of 000 . . . 000, a zero
differential voltage resulting in a code of 100 . . . 000, and a
positive full-scale voltage resulting in a code of 111 . . . 111.
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