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| 型號： | ADUC832BSZ-REEL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 66/92頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU 62K FLASH ADC/DAC 52MQFP |
| 標準包裝： | 800 |
| 系列： | MicroConverter® ADuC8xx |
| 核心處理器： | 8052 |
| 芯體尺寸： | 8-位 |
| 速度： | 16MHz |
| 連通性： | EBI/EMI，I²C，SPI，UART/USART |
| 外圍設(shè)備： | PSM，溫度傳感器，WDT |
| 輸入/輸出數(shù)： | 34 |
| 程序存儲器容量： | 62KB（62K x 8） |
| 程序存儲器類型： | 閃存 |
| EEPROM 大?。?/td> | 4K x 8 |
| RAM 容量： | 2.25K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2.7 V ~ 5.5 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 8x12b，D/A 2x12b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 125°C |
| 封裝/外殼： | 52-QFP |
| 包裝： | 帶卷 (TR) |
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Data Sheet
ADuC832
Rev. B | Page 69 of 92
MCO
I2CM
SFR
BITS
50ns GLITCH
REJECTION FILTER
HARDWARE I2C
(SLAVE ONLY)
Q3
Q4
SCLOCK
PIN
Q2
Q1
(OFF)
DVDD
SPE = 0 (I2C ENABLE)
02987-
061
Figure 72. SCLOCK Pin I/O Functional Equivalent in I2C Mode
HARDWARE SPI
(MASTER/SLAVE)
Q3
Q1
Q2 (OFF)
DVDD
SDATA/
MOSI
PIN
Q4 (OFF)
SPE = 1 (SPI ENABLE)
02987-
062
Figure 73. SDATA/MOSI Pin I/O Functional Equivalent in SPI Mode
Q3
Q4
Q2
Q1
(OFF)
DVDD
MDI
MDO
MDE
I2CM
HARDWARE I2C
(SLAVE ONLY)
50ns GLITCH
REJECTION FILTER
SDATA/
MOSI
PIN
SFR
BITS
SPE = 0 (I2C ENABLE)
02987-
063
Figure 74. SDATA/MOSI Pin I/O Functional Equivalent in I2C Mode
MISO is shared with P3.3 and as such has the same configuration
as that shown in Figure 70.
READ-MODIFY-WRITE INSTRUCTIONS
Some 8051 instructions that read a port read the latch while
others read the pin. The instructions that read the latch rather
than the pins are the ones that read a value, possibly change it,
and then rewrite it to the latch. These are called read-modify-write
instructions. Listed below are the read-modify-write instructions.
When the destination operand is a port, or a port bit, these
instructions read the latch rather than the pin.
Instruction
Description
ANL
Logical AND, for example, ANL P1, A
ORL
Logical OR, for example, ORL P2, A
XRL
Logical EX-OR, for example., XRL P3, A
JBC
Jump if bit = 1 and clear bit, for example, JBC
P1.1, LABEL
CPL
Complement bit, for example, CPL P3.0
INC
Increment, for example, INC P2
DEC
Decrement, for example, DEC P2
DJNZ
Decrement and jump if not zero, for example,
DJNZ P3, LABEL
MOV PX.Y, C1
Move carry to Bit Y of Port X
CLR PX.Y1
Clear Bit Y of Port X
SETB PX.Y1
Set Bit Y of Port X
1
These instructions read the port byte (all 8 bits), modify the addressed bit
and then write the new byte back to the latch.
The reason that read-modify-write instructions are directed to
the latch rather than the pin is to avoid a possible misinterpretation
of the voltage level of a pin. For example, a port pin might be
used to drive the base of a transistor. When a 1 is written to the
bit, the transistor is turned on. If the CPU then reads the same
port bit at the pin rather than the latch, it will read the base
voltage of the transistor and interpret it as a logic 0. Reading the
latch rather than the pin will return the correct value of 1.
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