參數(shù)資料
型號: ADUC832BSZ-REEL
廠商: Analog Devices Inc
文件頁數(shù): 32/92頁
文件大小: 0K
描述: IC MCU 62K FLASH ADC/DAC 52MQFP
標(biāo)準(zhǔn)包裝: 800
系列: MicroConverter® ADuC8xx
核心處理器: 8052
芯體尺寸: 8-位
速度: 16MHz
連通性: EBI/EMI,I²C,SPI,UART/USART
外圍設(shè)備: PSM,溫度傳感器,WDT
輸入/輸出數(shù): 34
程序存儲器容量: 62KB(62K x 8)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 4K x 8
RAM 容量: 2.25K x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x12b,D/A 2x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 125°C
封裝/外殼: 52-QFP
包裝: 帶卷 (TR)
ADuC832
Data Sheet
Rev. B | Page 38 of 92
ADCCON3 (ADC Control SFR 3)
SFR Address:
F5H
SFR Power-On Default Value:
00H
Bit Addressable:
No
The ADCCON3 register controls the operation of various
calibration modes as well as giving an indication of ADC busy
status.
Table 18. ADCCON3 SFR Bit Designations
Bit
Name
Description
[7]
Busy
The ADC busy status bit is a read-only status bit that is set during a valid ADC conversion or calibration cycle. Busy is
automatically cleared by the core at the end of conversion or calibration.
[6]
GNCLD
Gain calibration disable bit. Set to 0 to enable gain calibration. Set to 1 to disable gain calibration.
[5:4]
AVGS[1:0]
Number of averages selection bits. These bits select the number of ADC readings averaged during a calibration cycle.
AVGS1
AVGS0
Number of Averages
0
15
0
1
0
31
1
63
[3]
RSVD
Reserved. This bit should always be written as 0.
[2]
RSVD
This bit should always be written as 1 by the user when performing calibration.
[1]
Typical
Calibration type select bit. This bit selects between offset (zero-scale) and gain (full-scale) calibration.
Set to 0 for offset calibration.
Set to 1 for gain calibration.
[0]
SCAL
Start calibration cycle bit. When set, this bit starts the selected calibration cycle. It is automatically cleared when the
calibration cycle is completed.
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