Δ
參數(shù)資料
型號: AD9957/PCBZ
廠商: Analog Devices Inc
文件頁數(shù): 26/64頁
文件大?。?/td> 0K
描述: BOARD EVAL AD9957 QUADRATURE MOD
產(chǎn)品培訓(xùn)模塊: Direct Digital Synthesis Tutorial Series (1 of 7): Introduction
Direct Digital Synthesizer Tutorial Series (7 of 7): DDS in Action
Direct Digital Synthesis Tutorial Series (3 of 7): Angle to Amplitude Converter
Direct Digital Synthesis Tutorial Series (6 of 7): SINC Envelope Correction
Direct Digital Synthesis Tutorial Series (4 of 7): Digital-to-Analog Converter
Direct Digital Synthesis Tutorial Series (2 of 7): The Accumulator
設(shè)計資源: AD9957 Eval Brd Schematic
AD9957 BOM
AD9957 Gerber Files
標(biāo)準(zhǔn)包裝: 1
系列: AgileRF™
主要目的: 計時:DDS 調(diào)制器
嵌入式:
已用 IC / 零件: AD9957
主要屬性: 14 位數(shù)模轉(zhuǎn)換器,32 位調(diào)節(jié)字寬
次要屬性: 1GHz 圖形用戶界面
已供物品: 板,軟件
產(chǎn)品目錄頁面: 552 (CN2011-ZH PDF)
相關(guān)產(chǎn)品: AD9957BSVZ-ND - IC DDS 1GSPS 14BIT IQ 100TQFP
AD9957BSVZ-REEL-ND - IC DDS 1GSPS 14BIT IQ 100TQFP
AD9957
Data Sheet
Rev. C | Page 32 of 64
START ADDRESS
RAM
ADDRESS
END ADDRESS
1
1 PDCLK CYCLE
OR
M DDS CLOCK CYCLES
Δt
I/O_UPDATE OR
RT TRANSITION
2
3
1
Δt
06384-
025
Figure 45. Continuous Bidirectional Ramp Timing Diagram
RAM Continuous Bidirectional Ramp Mode
In continuous bidirectional ramp mode, upon assertion of an
I/O update or a state change on the RT pin, the RAM begins
playback operation using the parameters programmed into the
selected RAM segment register. Data is extracted from RAM
over the specified address range contained in the start address
and end address. The data is delivered at the appropriate rate
and to the destination as specified by the RAM playback
destination bit.
The playback rate is governed by the timer internal to the RAM
state machine and its period (Δt) is determined by the state of
the RAM playback destination bit as detailed in the RAM
After initialization, the internal state machine begins extracting
data from the RAM at the start address of the active RAM segment
register and increments the address counter until it reaches the
end address, at which point the state machine reverses the direc-
tion of the address counter and begins decrementing through
the address range. Whenever one of the terminal addresses is
reached, the state machine reverses the address counter; the
process continues indefinitely.
Note that a change in state of the RT pin aborts the current
waveform and the newly selected RAM segment register is used
to initiate a new waveform.
A graphic representation of the continuous bidirectional ramp
mode is shown in Figure 45. The circled numbers in Figure 45
indicate specific events, explained as follows:
Event 1—an I/O update or state change on the RT pin has
activated the RAM continuous bidirectional ramp mode. The
state machine initializes to the start address of the active RAM
segment register. The state machine begins incrementing
through the specified address range.
Event 2—the state machine reaches the end address of the active
RAM segment register.
Event 3—the state machine reaches the start address of the
active RAM segment register.
The continuous bidirectional ramp continues indefinitely until
the next I/O update or state change on the RT pin.
相關(guān)PDF資料
PDF描述
GCA22DRMD-S288 CONN EDGECARD 44POS .125 EXTEND
AD9959/PCBZ BOARD EVALUATION FOR AD9959
ECM12DTKT-S288 CONN EDGECARD 24POS .156 EXTEND
ATWEBDVK-02RC KIT DEV TCP/IP AT89C51RD2 REMOTE
KSZ8862-10FL-EVAL BOARD EVALUATION KSZ8862-10FL
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD9958 制造商:AD 制造商全稱:Analog Devices 功能描述:2-Channel 500 MSPS DDS with 10-Bit DACs
AD9958 PCB 制造商:Analog Devices 功能描述:EVAL BOARD ((NS))
AD9958/PCB 制造商:Analog Devices 功能描述:Evaluation Board For 2-Channel 500 MSPS DDS With 10-Bit DACs 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Analog Devices 功能描述:IC 10-BIT DAC DDS
AD9958/PCBZ 功能描述:BOARD EVALUATION FOR AD9958 RoHS:是 類別:編程器,開發(fā)系統(tǒng) >> 評估演示板和套件 系列:AgileRF™ 標(biāo)準(zhǔn)包裝:1 系列:PSoC® 主要目的:電源管理,熱管理 嵌入式:- 已用 IC / 零件:- 主要屬性:- 次要屬性:- 已供物品:板,CD,電源
AD9958/PCBZ 制造商:Analog Devices 功能描述:EVAL BOARD, AD9958 DIRECT DIGITAL SYNTHE