參數資料
型號: AD9957/PCBZ
廠商: Analog Devices Inc
文件頁數: 13/64頁
文件大?。?/td> 0K
描述: BOARD EVAL AD9957 QUADRATURE MOD
產品培訓模塊: Direct Digital Synthesis Tutorial Series (1 of 7): Introduction
Direct Digital Synthesizer Tutorial Series (7 of 7): DDS in Action
Direct Digital Synthesis Tutorial Series (3 of 7): Angle to Amplitude Converter
Direct Digital Synthesis Tutorial Series (6 of 7): SINC Envelope Correction
Direct Digital Synthesis Tutorial Series (4 of 7): Digital-to-Analog Converter
Direct Digital Synthesis Tutorial Series (2 of 7): The Accumulator
設計資源: AD9957 Eval Brd Schematic
AD9957 BOM
AD9957 Gerber Files
標準包裝: 1
系列: AgileRF™
主要目的: 計時:DDS 調制器
嵌入式:
已用 IC / 零件: AD9957
主要屬性: 14 位數模轉換器,32 位調節(jié)字寬
次要屬性: 1GHz 圖形用戶界面
已供物品: 板,軟件
產品目錄頁面: 552 (CN2011-ZH PDF)
相關產品: AD9957BSVZ-ND - IC DDS 1GSPS 14BIT IQ 100TQFP
AD9957BSVZ-REEL-ND - IC DDS 1GSPS 14BIT IQ 100TQFP
AD9957
Data Sheet
Rev. C | Page 20 of 64
SINGLE TONE MODE
A block diagram of the AD9957 operating in single tone mode
is shown in Figure 29; grayed items are inactive. In this mode,
both I and Q data paths are disabled from the 18-bit parallel
data port up to, and including, the modulator. The internal
DDS core produces a single frequency signal based on the
programmed tuning word. The user may select either the
cosine or sine output of the DDS. The sinusoid at the DDS
output can be scaled using a 14-bit amplitude scale factor (ASF)
and optionally routed through the inverse sinc filter.
Single tone mode offers the output shift keying (OSK) function.
It provides the ability to ramp the amplitude scale factor between
zero and an arbitrary preset value over a programmable time
interval.
06384-
009
PDCLK
I/Q IN
E
X
T
_P
W
R_DW
N
DAC_RSET
IOUT
TxENABLE
FTW
PW
DAC GAIN
θ
IN
VER
SE
S
INC
FILTE
R
CLOCK
FTW
PW
8
SYSCLK
PLL
÷2
CL
O
CK
M
O
DE
REF_CLK
REFCLK_OUT
XTAL_SEL
PARALLEL DATA
TIMING AND CONTROL
AD9957
ω
cos (ωt+θ)
sin (ωt+θ)
S
Y
NC_O
UT
S
Y
NC_I
N
P
LL_
LOC
K
P
LL_
LOOP
_
FI
L
T
ER
MA
ST
ER
_
R
ESET
2
CCI
_O
V
F
L
O
SK
DDS
AUX
DAC
8-BIT
POWER
DOWN
CONTROL
RT
RAM
P
R
OFILE
SERIAL I/O
PORT
I/O_
U
P
D
A
TE
PROGRAMMING
REGISTERS
3
I Q
IS QS
10
D
AT
A
SSEMB
L
ER
AND
F
O
RM
A
TTE
R
I
Q
IS
QS
BL
ACKF
IN
I
NT
E
R
F
ACE
18
16
HAL
F
-BAND
FI
L
T
ER
S
(4
×
)
IN
VER
SE
CCI
(1×
T
O
63×
)
HAL
F
-BAND
FI
L
T
ER
S
(4
×
)
IN
VER
SE
CCI
(1×
T
O
63×
)
OSK
INTERNAL CLOCK TIMING AND CONTROL
DAC
14-BIT
OUTPUT
SCALE
FACTOR
S
DI
O
CS
I/
O
_
R
ESET
S
CL
K
S
DO
Figure 29. Single Tone Mode
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