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參數資料
| 型號： | AD9957/PCBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數： | 25/64頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL AD9957 QUADRATURE MOD |
| 產品培訓模塊： | Direct Digital Synthesis Tutorial Series (1 of 7): Introduction Direct Digital Synthesizer Tutorial Series (7 of 7): DDS in Action Direct Digital Synthesis Tutorial Series (3 of 7): Angle to Amplitude Converter Direct Digital Synthesis Tutorial Series (6 of 7): SINC Envelope Correction Direct Digital Synthesis Tutorial Series (4 of 7): Digital-to-Analog Converter Direct Digital Synthesis Tutorial Series (2 of 7): The Accumulator |
| 設計資源： | AD9957 Eval Brd Schematic AD9957 BOM AD9957 Gerber Files |
| 標準包裝： | 1 |
| 系列： | AgileRF™ |
| 主要目的： | 計時：DDS 調制器 |
| 嵌入式： | 否 |
| 已用 IC / 零件： | AD9957 |
| 主要屬性： | 14 位數模轉換器，32 位調節(jié)字寬 |
| 次要屬性： | 1GHz 圖形用戶界面 |
| 已供物品： | 板，軟件 |
| 產品目錄頁面： | 552 (CN2011-ZH PDF) |
| 相關產品： | AD9957BSVZ-ND - IC DDS 1GSPS 14BIT IQ 100TQFP AD9957BSVZ-REEL-ND - IC DDS 1GSPS 14BIT IQ 100TQFP |
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Data Sheet
AD9957
Rev. C | Page 31 of 64
The circled numbers in Figure 44 indicate specific events,
explained as follows:
Event 1—an I/O update or profile change activates the RAM
bidirectional ramp mode.
Event 2—the RT pin switches to Logic 1. The state machine
initializes to the start address of RAM Segment Register 0 and
begins incrementing the RAM address counter.
Event 3—the RT pin remained at Logic 1 long enough for the
state machine to reach the end address of RAM Segment
Register 0, at which point the address counter is halted.
Event 4—the RT pin switches to Logic 0. The state machine
initializes to the end address of RAM Segment Register 1, resets
the internal timer, and begins decrementing the RAM address
counter.
Event 5—the RT pin switches to Logic 1. The state machine
initializes to the start address of RAM Segment Register 0,
resets the internal timer, and begins incrementing the RAM
address counter.
Event 6—the RT pin switches to Logic 0. The state machine
initializes to the end address of RAM Segment Register 1, resets
the internal timer, and begins decrementing the RAM address
counter.
Event 7—the RT pin remained at Logic 0 long enough for the
state machine to reach the start address of RAM Segment
Register 1, at which point the address counter is halted.
Event 8—the RT pin switches to Logic 1. The state machine
initializes to the start address of RAM Segment Register 0,
resets the internal timer, and begins incrementing the RAM
address counter.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| AD9958 | 制造商:AD 制造商全稱:Analog Devices 功能描述:2-Channel 500 MSPS DDS with 10-Bit DACs |
| AD9958 PCB | 制造商:Analog Devices 功能描述:EVAL BOARD ((NS)) |
| AD9958/PCB | 制造商:Analog Devices 功能描述:Evaluation Board For 2-Channel 500 MSPS DDS With 10-Bit DACs 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Analog Devices 功能描述:IC 10-BIT DAC DDS |
| AD9958/PCBZ | 功能描述:BOARD EVALUATION FOR AD9958 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:AgileRF™ 標準包裝:1 系列:PSoC® 主要目的:電源管理，熱管理 嵌入式:- 已用 IC / 零件:- 主要屬性:- 次要屬性:- 已供物品:板，CD，電源 |
| AD9958/PCBZ | 制造商:Analog Devices 功能描述:EVAL BOARD, AD9958 DIRECT DIGITAL SYNTHE |
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