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參數(shù)資料
型號: AD9549A/PCBZ
廠商: Analog Devices Inc
文件頁數(shù): 71/76頁
文件大?。?/td> 0K
描述: BOARD EVALUATION FOR AD9549A
設(shè)計(jì)資源: AD9549 Schematics
AD9549 Gerber Files
標(biāo)準(zhǔn)包裝: 1
主要目的: 計(jì)時(shí),時(shí)鐘發(fā)生器
嵌入式:
已用 IC / 零件: AD9549A
主要屬性: 8 kHz ~ 750 MHz 輸入
次要屬性: 差分輸出
已供物品:
AD9549
Rev. D | Page 73 of 76
APPLICATIONS INFORMATION
SAMPLE APPLICATIONS CIRCUIT
CLK
CLKB
SYNCB
LOW-PASS
FILTER
AD9514
/1...../32
Δt
OUT0/
OUT0B
OUT1/
OUT1B
OUT2/
OUT2B
SYSCLK
INPUT A
INPUT B
06744-
059
AD9549
DDS/
DAC
REF A
REF B
DIFF HSTL OUTPUT
FDBK_IN
FDBK_INB
CMOS OUTPUT
LDDS/CMOS
LVPECL
Figure 59. AD9549 and AD9514 Precision Clock Distribution Circuit
Applications Circuit Features
Features of this applications circuit include the following:
Input frequencies down to 8 kHz; output frequencies up to
400 MHz
Programmable loop bandwidth down to <1 Hz
Automatic redundant clock switchover with user-selectable
rate-of-phase adjustment
Automatic Stratum 3/3E clock holdover, depending on the
configuration
Phase noise (fC = 122.3 MHz and 100 Hz loop bandwidth);
100 Hz offset: 107 dBc/Hz; 1 kHz offset: 142 dBc/Hz;
100 kHz offset: 157 dBc/Hz; two zero-delay outputs with
programmable postdivider and synchronization
Two additional outputs (nonzero delay) on the AD9549
Programmable skew adjustment on one AD9514 output
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