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參數(shù)資料
| 型號(hào)： | AD9549A/PCBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 68/76頁 |
| 文件大小： | 0K |
| 描述： | BOARD EVALUATION FOR AD9549A |
| 設(shè)計(jì)資源： | AD9549 Schematics AD9549 Gerber Files |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 主要目的： | 計(jì)時(shí)，時(shí)鐘發(fā)生器 |
| 嵌入式： | 否 |
| 已用 IC / 零件： | AD9549A |
| 主要屬性： | 8 kHz ~ 750 MHz 輸入 |
| 次要屬性： | 差分輸出 |
| 已供物品： | 板 |
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AD9549
Rev. D | Page 70 of 76
Register 0x0332—Reference OOL (Continued)
Table 118.
Bits
Bit Name
Description
[7:0]
REFB OOL lower limit
See the Reference Frequency Monitor section.
Register 0x0333—Reference OOL (Continued)
Table 119.
Bits
Bit Name
Description
[15:8]
REFB OOL lower limit
See the Reference Frequency Monitor section.
Register 0x0334—Reference OOL (Continued)
Table 120.
Bits
Bit Name
Description
[23:16]
REFB OOL lower limit
See the Reference Frequency Monitor section.
Register 0x0335—Reference OOL (Continued)
Table 121.
Bits
Bit Name
Description
[31:24]
REFB OOL lower limit
See the Reference Frequency Monitor section.
CALIBRATION (USER-ACCESSIBLE TRIM) (REGISTER 0x0400 TO REGISTER 0x0410)
Register 0x0400—K-Divider
Table 122.
Bits
Bit Name
Description
[7:0]
K-divider
The K-divider alters precision of frequency estimator circuit. See the Frequency Estimator section.
Register 0x0401—K-Divider (Continued)
Table 123.
Bits
Bit Name
Description
[15:8]
K-divider
The K-divider alters precision of frequency estimator circuit. See the Frequency Estimator section.
Register 0x0402—CPFD Gain
Table 124.
Bits
Bit Name
Description
[2:0]
CPFD gain scale
This register is the coarse phase frequency power-of-2 multiplier (PDS). See the Phase Detector section. Note
that the correct value for this register is calculated by filter design software provided with the evaluation board.
Register 0x0403—CPFD Gain (Continued)
Table 125.
Bits
Bit Name
Description
[5:0]
CPFD gain
This register is the coarse phase frequency linear multiplier (PDG). See the Phase Detector section. Note
that the correct value for this register is calculated by filter design software provided with the evaluation board.
Register 0x0404—FPFD Gain
Table 126.
Bits
Bit Name
Description
[7:0]
FPFD gain
This register is the fine phase frequency detector linear multiplier (alters charge pump current). See the
Fine Phase Detector section. Note that the correct value for this register is calculated by filter design software
provided with the evaluation board.
Register 0x0405—Reserved
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