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參數(shù)資料
| 型號： | AD9146BCPZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 36/56頁 |
| 文件大小： | 0K |
| 描述： | IC DAC 16BIT SRL DUAL 48LFCSP |
| 標準包裝： | 1 |
| 系列： | TxDAC+® |
| 設(shè)置時間： | 20ns |
| 位數(shù)： | 16 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-WFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 48-LFCSP-WQ（7x7） |
| 包裝： | 托盤 |
| 輸出數(shù)目和類型： | 2 電流，單極 |
| 采樣率（每秒）： | 1.23G |
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Data Sheet
AD9146
Rev. A | Page 41 of 56
INTERFACING TO MODULATORS
The AD9146 interfaces to the ADL537x family of modulators
with a minimal number of components. An example of the
recommended interface circuitry is shown in Figure 56.
RBIP
50
RBIN
50
47
46
IBBN
IBBP
AD9146
ADL537x
RBQN
50
RBQP
50
38
39
RLI
100
RLQ
100
IOUT1N
IOUT1P
IOUT2P
IOUT2N
QBBP
QBBN
09691-
062
Figure 56. Typical Interface Circuitry Between the AD9146 and the ADL537x
Family of Modulators
The baseband inputs of the ADL537x family require a dc bias of
500 mV. The nominal midscale output current on each output of
the DAC is 10 mA (one-half the full-scale current). Therefore,
a single 50 resistor to ground from each of the DAC outputs
results in the desired 500 mV dc common-mode bias for the
inputs to the ADL537x. The signal level can be reduced through
the addition of the load resistor in parallel with the modulator
inputs. The peak-to-peak voltage swing of the transmitted signal is
)
2
(
)
2
(
L
B
L
B
FS
SIGNAL
R
I
V
+
×
=
BASEBAND FILTER IMPLEMENTATION
Most applications require a baseband anti-imaging filter between
the DAC and the modulator to filter out Nyquist images and
broadband DAC noise. The filter can be inserted between the
I-V resistors at the DAC output and the signal level setting
resistor across the modulator input. This establishes the input
and output impedances for the filter.
Figure 58 shows a fifth-order, low-pass filter. A common-mode
choke is used between the I-V resistors and the remainder of
the filter. This removes the common-mode signal produced by
the DAC and prevents the common-mode signal from being
converted to a differential signal, which can appear as unwanted
spurious signals in the output spectrum. Splitting the first filter
capacitor into two and grounding the center point creates a
common-mode low-pass filter, providing additional common-
mode rejection of high frequency signals. A purely differential
filter can pass common-mode signals.
DRIVING THE ADL5375-15
The ADL5375-15 requires a 1500 mV dc bias and, therefore,
requires a slightly more complex interface than most other
Analog Devices modulators. It is necessary to level-shift the
DAC output from a 500 mV dc bias to the 1500 mV dc bias
required by the ADL5375-15. Level-shifting can be achieved
with a purely passive network, as shown in Figure 57. In this
network, the dc bias of the DAC remains at 500 mV, whereas
the input to the ADL5375-15 is 1500 mV. This passive, level-
shifting network introduces approximately 2 dB of loss in the
ac signal.
47
46
IBBN
IBBP
AD9146
ADL5375-15
39
38
21
22
9
10
RBIP
45.3
RBIN
45.3
RBQN
45.3
RBQP
45.3
RLIP
3480
RLIN
3480
RLQN
3480
RLQP
3480
IOUT1N
IOUT1P
IOUT2P
IOUT2N
QBBP
QBBN
RSIP
1k
RSIN
1k
RSQN
1k
RSQP
1k
5V
09691-
063
Figure 57. Passive, Level-Shifting Network for Biasing the ADL5375-15
AD9146
50
33nH
2pF
56nH
100
6pF
3pF
22pF
ADL537x
09691-
064
Figure 58. DAC Modulator Interface with Fifth-Order, Low-Pass Filter
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| AD9146BCPZRL | 功能描述:IC DAC 16BIT SRL DUAL 48LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:TxDAC+® 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:1,000 系列:- 設(shè)置時間:1µs 位數(shù):8 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:8 電壓電源:雙 ± 功率耗散（最大）:941mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:24-SOIC W 包裝:帶卷 (TR) 輸出數(shù)目和類型:8 電壓，單極 采樣率（每秒）:* |
| AD9146-EBZ | 制造商:Analog Devices 功能描述:16 BIT DUAL SIGNAL PROC DAC EB - Boxed Product (Development Kits) |
| AD9146-M5375-EBZ | 功能描述:BOARD EVAL FOR AD9146 DAC RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - 數(shù)模轉(zhuǎn)換器 (DAC) 系列:TxDAC+® 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:1 系列:- DAC 的數(shù)量:4 位數(shù):12 采樣率（每秒）:- 數(shù)據(jù)接口:串行，SPI? 設(shè)置時間:3µs DAC 型:電流/電壓 工作溫度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581 |
| AD9148 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Quad 16-Bit,1 GSPS, TxDAC+ Digital-to-Analog Converter |
| AD9148ARUZ | 制造商:Analog Devices 功能描述:- Rail/Tube |
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