The inverse sinc (sinc1) f" />
參數(shù)資料
型號: AD9146BCPZ
廠商: Analog Devices Inc
文件頁數(shù): 30/56頁
文件大?。?/td> 0K
描述: IC DAC 16BIT SRL DUAL 48LFCSP
標(biāo)準(zhǔn)包裝: 1
系列: TxDAC+®
設(shè)置時(shí)間: 20ns
位數(shù): 16
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 2
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-WFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 48-LFCSP-WQ(7x7)
包裝: 托盤
輸出數(shù)目和類型: 2 電流,單極
采樣率(每秒): 1.23G
AD9146
Data Sheet
Rev. A | Page 36 of 56
INVERSE SINC FILTER
The inverse sinc (sinc1) filter is a nine-tap FIR filter. The composite
response of the sinc1 filter and the sin(x)/x response of the DAC
is shown in Figure 46. The composite response has a pass-band
ripple of less than ±0.05 dB up to a frequency of 0.4 × fDACCLK. To
provide the necessary peaking at the upper end of the pass band,
the inverse sinc filters shown have an intrinsic insertion loss of
about 3.2 dB. Figure 46 shows the composite frequency response.
The sinc1 filter is disabled by default. It can be enabled by setting
the bypass sinc1 bit to 0 (Register 0x1B, Bit 6).
–3.0
–3.2
–3.4
–3.6
–3.8
–4.0
0
0.5
0.3
0.4
0.2
0.1
M
AG
NI
T
UDE
(
d
B)
fOUT/fDAC
09691-
051
Figure 46. Sample Composite Responses of the Sinc1 Filter
with sin(x)/x Roll-Off
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