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參數(shù)資料
| 型號： | AD9146BCPZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 14/56頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 16BIT SRL DUAL 48LFCSP |
| 標準包裝： | 1 |
| 系列： | TxDAC+® |
| 設(shè)置時間： | 20ns |
| 位數(shù)： | 16 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-WFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 48-LFCSP-WQ（7x7） |
| 包裝： | 托盤 |
| 輸出數(shù)目和類型： | 2 電流，單極 |
| 采樣率（每秒）： | 1.23G |
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Data Sheet
AD9146
Rev. A | Page 21 of 56
Register
Name
Address
(Hex)
Bits
Name
Description
Default
Data Format
0x03
7
Binary data format
0 = input data is in twos complement format.
0
1 = input data is in binary format.
6
Q data first
Indicates I/Q data pairing on data input.
0
0 = I data sent to data receiver first.
1 = Q data sent to data receiver first.
5
MSB swap
Swaps the bit order of the data input port.
0
0 = order of the data bits corresponds to the pin descriptions.
1 = bit designations are swapped; most significant bits
become the least significant bits.
[1:0]
Data Bus Width[1:0]
Data receiver interface mode. See the LVDS Input Data Ports
section for information about the operation of the different
interface modes.
00
00 = byte mode; 8-bit interface bus width.
01 = byte mode; 8-bit interface bus width.
10 = nibble mode; 4-bit interface bus width.
11 = invalid.
Interrupt
Enable
0x04
7
Enable PLL lock lost
1 = enable interrupt for PLL lock lost.
0
6
Enable PLL locked
1 = enable interrupt for PLL locked.
0
5
Enable sync signal lost
1 = enable interrupt for sync signal lost.
0
4
Enable sync signal locked
1 = enable interrupt for sync signal locked.
0
1
Enable FIFO Warning 1
1 = enable interrupt for FIFO Warning 1.
0
Enable FIFO Warning 2
1 = enable interrupt for FIFO Warning 2.
0
0x05
[7:5]
Set to 0
Set these bits to 0.
000
4
Enable AED compare pass
1 = enable interrupt for AED comparison pass.
0
3
Enable AED compare fail
1 = enable interrupt for AED comparison fail.
0
2
Enable SED compare fail
1 = enable interrupt for SED comparison fail.
0
[1:0]
Set to 0
Set these bits to 0.
00
Event Flag
0x06
7
PLL lock lost
1 = indicates that the PLL, which had been previously
locked, has unlocked from the reference signal. This is a
latched signal.
N/A
6
PLL locked
1 = indicates that the PLL has locked to the reference
clock input.
N/A
5
Sync signal lost
1 = indicates that the sync logic, which had been previously
locked, has lost alignment. This is a latched signal.
N/A
4
Sync signal locked
1 = indicates that the sync logic has achieved sync
alignment. This is indicated when no phase changes
were requested for at least a few full averaging cycles.
N/A
1
FIFO Warning 1
1 = indicates that the difference between the FIFO read
and write pointers is 1.
N/A
0
FIFO Warning 2
1 = indicates that the difference between the FIFO read
and write pointers is 2.
N/A
Note that all event flags are cleared by writing the respective bit high.
0x07
4
AED compare pass
1 = indicates that the SED logic detected a valid input data
pattern compared against the preprogrammed expected
values. This is a latched signal.
N/A
3
AED compare fail
1 = indicates that the SED logic detected an invalid input data
pattern compared against the preprogrammed expected
values. This latched signal is automatically cleared when
eight valid I/Q data pairs are received.
N/A
2
SED compare fail
1 = indicates that the SED logic detected an invalid input
data pattern compared against the preprogrammed
expected values. This is a latched signal.
N/A
Note that all event flags are cleared by writing the respective bit high.
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| AD9146BCPZRL | 功能描述:IC DAC 16BIT SRL DUAL 48LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:TxDAC+® 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:1,000 系列:- 設(shè)置時間:1µs 位數(shù):8 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:8 電壓電源:雙 ± 功率耗散（最大）:941mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:24-SOIC W 包裝:帶卷 (TR) 輸出數(shù)目和類型:8 電壓，單極 采樣率（每秒）:* |
| AD9146-EBZ | 制造商:Analog Devices 功能描述:16 BIT DUAL SIGNAL PROC DAC EB - Boxed Product (Development Kits) |
| AD9146-M5375-EBZ | 功能描述:BOARD EVAL FOR AD9146 DAC RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - 數(shù)模轉(zhuǎn)換器 (DAC) 系列:TxDAC+® 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:1 系列:- DAC 的數(shù)量:4 位數(shù):12 采樣率（每秒）:- 數(shù)據(jù)接口:串行，SPI? 設(shè)置時間:3µs DAC 型:電流/電壓 工作溫度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581 |
| AD9148 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Quad 16-Bit,1 GSPS, TxDAC+ Digital-to-Analog Converter |
| AD9148ARUZ | 制造商:Analog Devices 功能描述:- Rail/Tube |
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