- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄1888 > AD14060LBF-4 (Analog Devices Inc)IC DSP CMOS 32BIT 308CQFP PDF資料下載
參數(shù)資料
| 型號： | AD14060LBF-4 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 44/48頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DSP CMOS 32BIT 308CQFP |
| 產(chǎn)品培訓模塊： | SHARC Processor Overview |
| 標準包裝： | 1 |
| 系列： | SHARC® |
| 類型： | 浮點 |
| 接口： | 主機接口，連接端口，串行端口 |
| 時鐘速率： | 40MHz |
| 非易失內(nèi)存： | 外部 |
| 芯片上RAM： | 2MB |
| 電壓 - 輸入/輸出： | 3.30V |
| 電壓 - 核心： | 3.30V |
| 工作溫度： | -40°C ~ 100°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 308-CBQFP |
| 供應商設(shè)備封裝： | 308-CQFP（52x52） |
| 包裝： | 托盤 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁當前第44頁第45頁第46頁第47頁第48頁
AD14060/AD14060L
Rev. B | Page 5 of 48
TIMING SPECIFICATIONS
This data sheet represents production-released specifications
for the AD14060 (5 V), and for the AD14060L (3.3 V). The
ADSP-21060 die components are 100% tested, and the
assembled AD14060/AD14060L units are again extensively
tested at speed and across temperature. Parametric limits were
established from the ADSP-21060 characterization followed by
further design and analysis of the AD14060/AD14060L package
characteristics.
The specifications are based on a CLKIN frequency of 40 MHz
(tCK = 25 ns). The DT derating allows specifications at other
CLKIN frequencies (within the minimum to maximum range
between the actual CLKIN period and a CLKIN period of 25 ns:
DT = tCK 25 ns
Use the exact timing information given. Do not attempt to
derive parameters from the addition or subtraction of others.
While addition or subtraction would yield meaningful results
for an individual device, the values given in this data sheet
reflect statistical variations and worst cases. Consequently, one
cannot meaningfully add parameters to derive longer times.
Switching Characteristics specify how the processor changes its
signals. The user has no control over this timing—circuitry
external to the processor must be designed for compatibility
with these signal characteristics. Switching characteristics
specify what the processor does in a given circumstance. The
user can also use switching characteristics to ensure that any
timing requirement of a device connected to the processor
(such as memory) is satisfied.
Timing Requirements apply to signals that are controlled by
circuitry external to the processor, such as the data input for a
read operation. Timing requirements guarantee that the
processor operates correctly with other devices.
(O/D) = Open Drain
(A/D) = Active Drive
Table 3. Clock Input
40 MHz (5 V)
40 MHz (3.3 V)
Parameter
Min
Max
Min
Max
Unit
Clock Input
Timing Requirements:
tCK
CLKIN Period
25
100
25
100
ns
tCKL
CLKIN Width Low
7
9.5
ns
tCKH
CLKIN Width High
5
ns
tCKRF
CLKIN Rise/Fall (0.4 V to 2.0 V)
3
ns
CLKIN
tCKH
tCKL
tCK
00667-011
Figure 2. Clock Input
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD1833AASTZ-REEL | IC DAC AUDIO 24BIT 6CH 48LQFP |
| AD1835AASZ | IC CODEC 2ADC/8DAC 24BIT 52-MQFP |
| AD1836ACSZ | IC CODEC 4ADC/6DAC 24 BIT 52MQFP |
| AD1838AASZ | IC CODEC 2ADC/6DAC 24 BIT 52MQFP |
| AD1851RZ-J | IC DAC AUDIO FASTSET 16B 16SOIC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD14160 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Quad-SHARC DSP Multiprocessor Family |
| AD14160BB-4 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| AD14160KB-4 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| AD14160L | 制造商:AD 制造商全稱:Analog Devices 功能描述:Quad-SHARC DSP Multiprocessor Family |
| AD14160LBB-4 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Quad-SHARC DSP Multiprocessor Family |
發(fā)布緊急采購，3分鐘左右您將得到回復。