
309
μPD780948, μPD78F0948, μPD780949, μPD78F0949
Symbol
7
6
5
4
3
2
1
0
Address
After Reset
R/W
MCNT
CADD1
CADD0
0
MCNT4
MCNT3
MCNT2
MCNT1
MCNT0
FFB7H
C0H
R/W
Message Count Register
These register sets the number of receive message buffers and the RAM area of the receive message
buffers which are handled by the DCAN-module.
MCNT can be read with an 8-bit memory manipulation instruction.
RESET input sets MCNT to C0H.
Figure 18-41: Message Count Register
This register is readable at any time. Write is only permitted when the CAN is in initialization mode.
The DCAN can use different address areas in the IXRAM. This register defines the lower starting address
for the DCAN area. The upper limit is defined by the number of messages defined with MCNT.
The DCAN address definition gives the possibility to initialize the 78K0 with different memory configu-
ration with the IXS register. In case of this product it is recommended to use a short address of the
expansion RAM (F400h) and to set CADD1 and CADD0 to 1.0.
MCNT4
MCNT3
MCNT2
MCNT1
MCNT0
Receive Message Count
0
0
0
0
0
No receive message handling
0
0
0
0
1
1 receive buffer
0
0
0
1
0
2 receive buffer
0
0
0
1
1
3 receive buffer
0
0
1
0
0
4 receive buffer
0
0
1
0
1
5 receive buffer
0
0
1
1
0
6 receive buffer
0
0
1
1
1
7 receive buffer
0
1
0
0
0
8 receive buffer
0
1
0
0
1
9 receive buffer
0
1
0
1
0
10 receive buffer
0
1
0
1
1
11 receive buffer
0
1
1
0
0
12 receive buffer
0
1
1
0
1
13 receive buffer
0
1
1
1
0
14 receive buffer
0
1
1
1
1
15 receive buffer
1
0
0
0
0
16 receive buffer
Setting prohibited, will be
automatically changed to 16
CADD1
CADD0
DCAN Address Definition
0
0
Setting prohibited
0
1
Setting prohibited
1
0
DCAN uses address range starting at 0F400h
1
1
DCAN uses address range starting at 0F600h, reset value