
16
μPD780948, μPD78F0948, μPD780949, μPD78F0949
Contents of Figures
Figure No.
Title
Page
1-1
1-2
Pin Configuration ............................................................................................................
Block Diagram ................................................................................................................
27
30
2-1
2-2
Connection of IC Pins .....................................................................................................
Pin Input/Output Circuits.................................................................................................
44
48
3-1
3-2
3-3
3-4
3-5
3-6
3-7
3-8
3-9
3-10
3-11
3-12
3-13
3-14
3-15
3-16
3-17
3-18
Memory Map (μPD780949) .............................................................................................
Memory Map (μPD78F0949) ...........................................................................................
Data Memory Addressing (μPD780949) ..........................................................................
Data Memory Addressing (μPD78F0949) ........................................................................
Program Counter Configuration .......................................................................................
Program Status Word Configuration ................................................................................
Stack Pointer Configuration.............................................................................................
Data to be Saved to Stack Memory ................................................................................
Data to be Reset to Stack Memory.................................................................................
General Register Configuration .......................................................................................
Relative Addressing........................................................................................................
Immediate Addressing ....................................................................................................
Table Indirect Addressing................................................................................................
Register Addressing........................................................................................................
Register Addressing........................................................................................................
Short Direct Addressing..................................................................................................
Special-Function Register (SFR) Addressing ..................................................................
Special-Function Register (SFR) Addressing ..................................................................
52
53
57
58
59
59
61
61
61
62
68
69
70
71
73
75
76
77
4-1
4-2
EEPROM Block Diagram................................................................................................
EEPROM Write Control Register (EEWC) Format ...........................................................
82
83
5-1
5-2
5-3
5-4
5-5
5-6
5-7
5-8
5-9
5-10
5-11
5-12
5-13
5-14
5-15
5-16
Port Types.......................................................................................................................
P00 to P07 Configurations ..............................................................................................
P10 to P17 Configurations ..............................................................................................
P20 to P26 Configurations ..............................................................................................
P30 to P34 Configurations ..............................................................................................
P40 to P47 Configurations ..............................................................................................
P50 to P57 Configurations ..............................................................................................
P64, P65 and P67 Configurations ...................................................................................
P70 to P77 Configurations ..............................................................................................
P120 to P127 Configurations ..........................................................................................
P130 to P137 Configurations ..........................................................................................
P140 to P147 Configurations ..........................................................................................
Port Mode Register Format .............................................................................................
Pull-Up Resistor Option Register (PU0, PU4, PU7 and PU13) Format.............................
Port Function Register (PF2, PF5, PF7, PF12 to PF14) Format .....................................
Memory Expansion Mode Register Format .....................................................................
87
91
92
93
94
95
96
97
98
99
100
101
103
104
105
106