
18
μPD780948, μPD78F0948, μPD780949, μPD78F0949
Figure No.
Title
Page
8-1
8-2
8-3
8-4
8-5
Timer 0 (TM0) Block Diagram .........................................................................................
16-Bit Timer Mode Control Register (TMC2) Format........................................................
Capture Pulse Control Register (CRC2) Format...............................................................
Prescaler Mode Register (PRM2) Format........................................................................
Configuration Diagram for Pulse Width Measurement by Using the Free Running
Counter...........................................................................................................................
Timing of Pulse Width Measurement Operation by Using the Free Running Counter
and One Capture Register (with Both Edges Specified)...................................................
CR2m Capture Operation with Rising Edge Specified .....................................................
Timing of Pulse Width Measurement Operation by Free Running Counter (with Both
Edges Specified) ............................................................................................................
16-Bit Timer Register Start Timing ..................................................................................
Capture Register Data Retention Timing..........................................................................
157
159
160
161
162
8-6
162
163
8-7
8-8
164
165
165
8-9
8-10
9-1
9-2
9-3
9-4
9-5
9-6
9-7
9-8
9-9
9-10
9-11
9-12
9-13
9-14
9-15
9-16
9-17
9-18
9-19
9-20
9-21
9-22
8-Bit Timer/Event Counter 50 Block Diagram ..................................................................
8-Bit Timer/Event Counter 51 Block Diagram ..................................................................
Block Diagram of 8-Bit Timer/Event Counters 50 and 51 Output Control Circuit ..............
Timer Clock Select Register 50 Format ..........................................................................
Timer Clock Select Register 51 Format ..........................................................................
8-Bit Timer Output Control Register Format ....................................................................
8-Bit Timer Output Control Register 51 Format................................................................
Port Mode Register 10 Format ........................................................................................
8-Bit Timer Mode Control Register Settings for Interval Timer Operation .........................
Interval Timer Operation Timings (3/3) ............................................................................
8-Bit Timer Mode Control Register Setting for External Event Counter Operation ............
External Event Counter Operation Timings (with Rising Edge Specified).........................
8-Bit Timer Mode Control Register Settings for Square-Wave Output Operation ..............
Square-wave Output Operation Timing ............................................................................
8-Bit Timer Control Register Settings for PWM Output Operation....................................
PWM Output Operation Timing (Active high setting) .......................................................
PWM Output Operation Timings (CRn0 = 00H, active high setting).................................
PWM Output Operation Timings (CRn = FFH, active high setting) ..................................
PWM Output Operation Timings (CRn changing, active high setting) ..............................
8-bit Timer Registers 50 and 51 Start Timings ................................................................
External Event Counter Operation Timings......................................................................
Timings after Compare Register Change during Timer Count Operation ..........................
170
171
172
173
174
175
176
177
178
178
182
182
183
183
185
186
186
187
187
188
188
189
10-1
10-2
10-3
Block Diagram of Watch Timer ........................................................................................
Watch Timer Mode Control Register (WTM) Format ........................................................
Operation Timing of Watch Timer/Interval Timer ..............................................................
191
193
195
11-1
11-2
11-3
Watchdog Timer Block Diagram ......................................................................................
Timer Clock Select Register 2 Format ............................................................................
Watchdog Timer Mode Register Format ..........................................................................
198
199
200
12-1
12-2
12-3
12-4
Remote Controlled Output Application Example..............................................................
Clock Output Control Circuit Block Diagram....................................................................
Clock Output Selection Register Format .........................................................................
Port Mode Register 3 Format ..........................................................................................
204
205
206
207