
141
μPD780948, μPD78F0948, μPD780949, μPD78F0949
(3) Pulse width measurement with free running counter and two capture registers
When the 16-bit timer register (TM0) is used as a free running counter (refer to Figure 7-17), the pulse
width of the signal input to the TI00 pin can be measured.
When the edge specified by bits 4 and 5 (ES00 and ES01) of the prescaler mode register 0 (PRM0) is
input to the TI00 pin, the value of TM0 is loaded to the 16-bit capture/compare register 01 (CR01), and
an external interrupt request signal (INTTM01) is set.
The value of TM0 is also loaded to the 16-bit capture/compare register 00 (CR00) when an edge reverse
to the one that triggers capturing to CR01 is input.
The edge of the TI00 pin is specified by bits 4 and 5 (ES00 and ES01) of the prescaler mode register
0 (PRM0). The rising or falling edge can be specified.
The valid edge of TI00/P05 pin and TI01/P04 pin is detected through sampling at a count clock cycle
selected by the prescaler mode register 0 (PRM0), and the capture operation is not performed until the
valid level is detected two times. Therefore, noise with a short pulse width can be rejected.
Caution:
If the valid edge of the TI00 pin is specified to be both the rising and falling edges, the
capture/compare register 00 (CR00) cannot perform its capture operation.
Figure 7-17: Control Register Settings for Pulse Width Measurement with Free Running Counter
and Two Capture Registers
(a) 16-bit timer mode control register (TMC0)
(b) Capture/compare control register 0 (CRC0)
Remark:
0/1: When these bits are reset to 0 or set to 1, the other functions can be used along with
the pulse width measurement function. For details, refer to Figures 7-2 and 7-3.
0
0
0
0
TMC03
0
TMC02
1
TMC01
0/1
OVF0
0
TMC0
Free running mode
0
0
0
0
0
CRC02
1
CRC01
1
CRC00
1
CRC0
NCR00 as capture register
Captures to CR00 at edge reverse to valid
edge o f TI00/P35pin.
CR01 as capture register